149 lines
4.0 KiB
Rust
149 lines
4.0 KiB
Rust
//! 32-bit ARM Instruction Set Architecture.
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use crate::ir::condcodes::IntCC;
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use crate::ir::Function;
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use crate::isa::{Builder as IsaBuilder, TargetIsa};
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use crate::machinst::{
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compile, MachCompileResult, MachTextSectionBuilder, TextSectionBuilder, VCode,
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};
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use crate::result::CodegenResult;
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use crate::settings;
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use alloc::{boxed::Box, vec::Vec};
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use core::fmt;
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use regalloc::{PrettyPrint, RealRegUniverse};
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use target_lexicon::{Architecture, ArmArchitecture, Triple};
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// New backend:
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mod abi;
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mod inst;
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mod lower;
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mod lower_inst;
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use inst::{create_reg_universe, EmitInfo};
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/// An ARM32 backend.
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pub struct Arm32Backend {
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triple: Triple,
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flags: settings::Flags,
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reg_universe: RealRegUniverse,
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}
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impl Arm32Backend {
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/// Create a new ARM32 backend with the given (shared) flags.
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pub fn new_with_flags(triple: Triple, flags: settings::Flags) -> Arm32Backend {
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let reg_universe = create_reg_universe();
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Arm32Backend {
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triple,
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flags,
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reg_universe,
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}
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}
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fn compile_vcode(
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&self,
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func: &Function,
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flags: settings::Flags,
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) -> CodegenResult<VCode<inst::Inst>> {
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// This performs lowering to VCode, register-allocates the code, computes
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// block layout and finalizes branches. The result is ready for binary emission.
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let emit_info = EmitInfo::new(flags.clone());
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let abi = Box::new(abi::Arm32ABICallee::new(func, flags)?);
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compile::compile::<Arm32Backend>(func, self, abi, &self.reg_universe, emit_info)
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}
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}
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impl TargetIsa for Arm32Backend {
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fn compile_function(
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&self,
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func: &Function,
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want_disasm: bool,
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) -> CodegenResult<MachCompileResult> {
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let flags = self.flags();
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let vcode = self.compile_vcode(func, flags.clone())?;
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let (buffer, bb_starts, bb_edges) = vcode.emit();
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let frame_size = vcode.frame_size();
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let stackslot_offsets = vcode.stackslot_offsets().clone();
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let disasm = if want_disasm {
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Some(vcode.show_rru(Some(&create_reg_universe())))
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} else {
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None
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};
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let buffer = buffer.finish();
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Ok(MachCompileResult {
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buffer,
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frame_size,
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disasm,
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value_labels_ranges: Default::default(),
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stackslot_offsets,
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bb_starts,
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bb_edges,
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})
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}
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fn name(&self) -> &'static str {
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"arm32"
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}
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fn triple(&self) -> &Triple {
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&self.triple
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}
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fn flags(&self) -> &settings::Flags {
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&self.flags
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}
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fn isa_flags(&self) -> Vec<settings::Value> {
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Vec::new()
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}
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#[cfg(feature = "unwind")]
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fn emit_unwind_info(
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&self,
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_result: &MachCompileResult,
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_kind: crate::machinst::UnwindInfoKind,
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) -> CodegenResult<Option<crate::isa::unwind::UnwindInfo>> {
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Ok(None) // FIXME implement this
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}
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fn unsigned_add_overflow_condition(&self) -> IntCC {
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// Carry flag set.
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IntCC::UnsignedGreaterThanOrEqual
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}
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fn text_section_builder(&self, num_funcs: u32) -> Box<dyn TextSectionBuilder> {
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Box::new(MachTextSectionBuilder::<inst::Inst>::new(num_funcs))
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}
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}
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impl fmt::Display for Arm32Backend {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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f.debug_struct("MachBackend")
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.field("name", &self.name())
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.field("triple", &self.triple())
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.field("flags", &format!("{}", self.flags()))
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.finish()
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}
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}
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/// Create a new `isa::Builder`.
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pub fn isa_builder(triple: Triple) -> IsaBuilder {
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assert!(match triple.architecture {
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Architecture::Arm(ArmArchitecture::Arm)
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| Architecture::Arm(ArmArchitecture::Armv7)
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| Architecture::Arm(ArmArchitecture::Armv6) => true,
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_ => false,
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});
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IsaBuilder {
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triple,
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setup: settings::builder(),
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constructor: |triple, shared_flags, _| {
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let backend = Arm32Backend::new_with_flags(triple, shared_flags);
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Box::new(backend)
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},
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}
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}
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