353caf23cd
Use the information in the ISA's registers.py files to generate a RegInfo Rust data structure.
52 lines
1.5 KiB
Python
52 lines
1.5 KiB
Python
"""
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Generate register bank descriptions for each ISA.
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"""
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from __future__ import absolute_import
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import srcgen
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try:
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from typing import Sequence # noqa
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from cdsl.isa import TargetISA # noqa
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from cdsl.registers import RegBank # noqa
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except ImportError:
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pass
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def gen_regbank(regbank, fmt):
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# type: (RegBank, srcgen.Formatter) -> None
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"""
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Emit a static data definition for regbank.
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"""
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with fmt.indented(
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'RegBank {{'.format(regbank.name), '},'):
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fmt.line('name: "{}",'.format(regbank.name))
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fmt.line('first_unit: {},'.format(regbank.first_unit))
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fmt.line('units: {},'.format(regbank.units))
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fmt.line(
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'names: &[{}],'
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.format(', '.join('"{}"'.format(n) for n in regbank.names)))
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fmt.line('prefix: "{}",'.format(regbank.prefix))
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def gen_isa(isa, fmt):
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# type: (TargetISA, srcgen.Formatter) -> None
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"""
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Generate register tables for isa.
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"""
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if not isa.regbanks:
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print('cargo:warning={} has no register banks'.format(isa.name))
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with fmt.indented('pub static INFO: RegInfo = RegInfo {', '};'):
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# Bank descriptors.
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with fmt.indented('banks: &[', '],'):
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for regbank in isa.regbanks:
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gen_regbank(regbank, fmt)
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def generate(isas, out_dir):
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# type: (Sequence[TargetISA], str) -> None
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for isa in isas:
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fmt = srcgen.Formatter()
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gen_isa(isa, fmt)
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fmt.update_file('registers-{}.rs'.format(isa.name), out_dir)
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