Jakob Stoklund Olesen 305de3e73b Add an enable_e setting for the RV32E instruction set. ...

This limited RISC-V version only has registers %x0 - %x15.

Make sure the ABI lowering code doesn't use the banned registers for
arguments.

2017-04-26 13:50:52 -07:00

..

base

Add an enable_verifier setting.

2017-04-21 09:49:03 -07:00

cdsl

Stop tracking if instruction formats have multiple results.

2017-04-13 12:27:39 -07:00

isa

Add an enable_e setting for the RV32E instruction set.

2017-04-26 13:50:52 -07:00

build.py

Add a mypy.ini file and enable some more warnings.

2017-03-30 19:52:49 -07:00

check.sh

Run Python checks from test-all.sh

2017-01-25 14:12:36 -08:00

constant_hash.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

gen_binemit.py

Generate binemit::emit_inst() functions.

2017-03-28 14:44:36 -07:00

gen_build_deps.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

gen_encoding.py

Add jump encodings to RISC-V.

2017-04-06 15:17:57 -07:00

gen_instr.py

Remove the first_type() methods from InstructionData.

2017-04-12 14:32:13 -07:00

gen_legalizer.py

Avoid creating aliases when expanding legalizer patterns.

2017-04-13 09:30:21 -07:00

gen_registers.py

Implement legalize_signature for RISC-V.

2017-03-03 11:09:55 -08:00

gen_settings.py

Add mypy types for gen_settings.py.

2017-03-30 18:42:06 -07:00

gen_types.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

mypy.ini

Add a mypy.ini file and enable some more warnings.

2017-03-30 19:52:49 -07:00

srcgen.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

test_constant_hash.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

test_srcgen.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

unique_table.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00