Jakob Stoklund Olesen d66a9d196e Implement binary emission of RISC-V return instructions. ...

The return address is now always supplied in %x1, so the return address
predictor will recognize the jalr as a return and not some indirect
branch.

2017-04-19 16:26:04 -07:00

..

arm32

Add a section about implementation limits.

2017-02-24 11:08:15 -08:00

arm64

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

intel

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

riscv

Implement binary emission of RISC-V return instructions.

2017-04-19 16:26:04 -07:00

__init__.py

Fixed for mypy 0.501.

2017-03-03 09:08:28 -08:00