a0318f36f0
This PR switches Cranelift over to the new register allocator, regalloc2. See [this document](https://gist.github.com/cfallin/08553421a91f150254fe878f67301801) for a summary of the design changes. This switchover has implications for core VCode/MachInst types and the lowering pass. Overall, this change brings improvements to both compile time and speed of generated code (runtime), as reported in #3942: ``` Benchmark Compilation (wallclock) Execution (wallclock) blake3-scalar 25% faster 28% faster blake3-simd no diff no diff meshoptimizer 19% faster 17% faster pulldown-cmark 17% faster no diff bz2 15% faster no diff SpiderMonkey, 21% faster 2% faster fib(30) clang.wasm 42% faster N/A ```
82 lines
1021 B
Plaintext
82 lines
1021 B
Plaintext
test compile precise-output
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target s390x
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; TRAP/RESUMABLE_TRAP
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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function %trap() {
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block0:
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trap user0
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}
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; block0:
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; trap
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function %resumable_trap() {
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block0:
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trap user0
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}
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; block0:
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; trap
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function %trapz(i64) {
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block0(v0: i64):
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v1 = iconst.i64 42
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v2 = icmp eq v0, v1
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trapz v2, user0
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return
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}
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; block0:
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; clgfi %r2, 42
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; jge label1 ; jg label2
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; block1:
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; br %r14
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; block2:
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; trap
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function %trapnz(i64) {
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block0(v0: i64):
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v1 = iconst.i64 42
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v2 = icmp eq v0, v1
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trapnz v2, user0
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return
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}
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; block0:
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; clgfi %r2, 42
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; jgne label1 ; jg label2
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; block1:
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; br %r14
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; block2:
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; trap
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function %resumable_trapnz(i64) {
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block0(v0: i64):
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v1 = iconst.i64 42
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v2 = icmp eq v0, v1
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trapnz v2, user0
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return
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}
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; block0:
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; clgfi %r2, 42
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; jgne label1 ; jg label2
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; block1:
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; br %r14
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; block2:
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; trap
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function %h() {
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block0:
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debugtrap
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return
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}
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; block0:
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; debugtrap
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; br %r14
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