a0318f36f0
This PR switches Cranelift over to the new register allocator, regalloc2. See [this document](https://gist.github.com/cfallin/08553421a91f150254fe878f67301801) for a summary of the design changes. This switchover has implications for core VCode/MachInst types and the lowering pass. Overall, this change brings improvements to both compile time and speed of generated code (runtime), as reported in #3942: ``` Benchmark Compilation (wallclock) Execution (wallclock) blake3-scalar 25% faster 28% faster blake3-simd no diff no diff meshoptimizer 19% faster 17% faster pulldown-cmark 17% faster no diff bz2 15% faster no diff SpiderMonkey, 21% faster 2% faster fib(30) clang.wasm 42% faster N/A ```
56 lines
919 B
Plaintext
56 lines
919 B
Plaintext
test compile precise-output
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target s390x
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; SYMBOL_VALUE
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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function %symbol_value() -> i64 {
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gv0 = symbol %my_global
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block0:
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v0 = symbol_value.i64 gv0
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return v0
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}
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; block0:
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; bras %r1, 12 ; data %my_global + 0 ; lg %r2, 0(%r1)
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; br %r14
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function %symbol_value_colocated() -> i64 {
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gv0 = symbol colocated %my_global_colo
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block0:
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v0 = symbol_value.i64 gv0
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return v0
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}
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; block0:
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; larl %r2, %my_global_colo + 0
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; br %r14
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function %func_addr() -> i64 {
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fn0 = %my_func(i64) -> i64
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block0:
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v0 = func_addr.i64 fn0
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return v0
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}
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; block0:
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; bras %r1, 12 ; data %my_func + 0 ; lg %r2, 0(%r1)
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; br %r14
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function %func_addr_colocated() -> i64 {
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fn0 = colocated %my_func_colo(i64) -> i64
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block0:
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v0 = func_addr.i64 fn0
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return v0
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}
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; block0:
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; larl %r2, %my_func_colo + 0
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; br %r14
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