Files
wasmtime/cranelift/filetests/filetests/isa/s390x/bitops-arch13.clif
Trevor Elliott b077854b57 Generate SSA code from returns (#5172)
Modify return pseudo-instructions to have pairs of registers: virtual and real. This allows us to constrain the virtual registers to the real ones specified by the abi, instead of directly emitting moves to those real registers.
2022-11-08 16:00:49 -08:00

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test compile precise-output
target s390x arch13
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; POPCNT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
function %popcnt_i64(i64) -> i64 {
block0(v0: i64):
v1 = popcnt v0
return v1
}
; block0:
; popcnt %r2, %r2, 8
; br %r14
function %popcnt_i32(i32) -> i32 {
block0(v0: i32):
v1 = popcnt v0
return v1
}
; block0:
; llgfr %r4, %r2
; popcnt %r2, %r4, 8
; br %r14
function %popcnt_i16(i16) -> i16 {
block0(v0: i16):
v1 = popcnt v0
return v1
}
; block0:
; llghr %r4, %r2
; popcnt %r2, %r4, 8
; br %r14
function %popcnt_i8(i8) -> i8 {
block0(v0: i8):
v1 = popcnt v0
return v1
}
; block0:
; popcnt %r2, %r2
; br %r14