b077854b57
Modify return pseudo-instructions to have pairs of registers: virtual and real. This allows us to constrain the virtual registers to the real ones specified by the abi, instead of directly emitting moves to those real registers.
71 lines
1.6 KiB
Plaintext
71 lines
1.6 KiB
Plaintext
test compile precise-output
|
|
target s390x
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ATOMIC_CAS
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
function %atomic_cas_i64(i64, i64, i64) -> i64 {
|
|
block0(v0: i64, v1: i64, v2: i64):
|
|
v3 = atomic_cas.i64 little v2, v0, v1
|
|
return v3
|
|
}
|
|
|
|
; block0:
|
|
; lrvgr %r5, %r2
|
|
; lrvgr %r2, %r3
|
|
; csg %r5, %r2, 0(%r4)
|
|
; lrvgr %r2, %r5
|
|
; br %r14
|
|
|
|
function %atomic_cas_i32(i32, i32, i64) -> i32 {
|
|
block0(v0: i32, v1: i32, v2: i64):
|
|
v3 = atomic_cas.i32 little v2, v0, v1
|
|
return v3
|
|
}
|
|
|
|
; block0:
|
|
; lrvr %r5, %r2
|
|
; lrvr %r2, %r3
|
|
; cs %r5, %r2, 0(%r4)
|
|
; lrvr %r2, %r5
|
|
; br %r14
|
|
|
|
function %atomic_cas_i16(i64, i16, i16, i64) -> i16 {
|
|
block0(v0: i64, v1: i16, v2: i16, v3: i64):
|
|
v4 = atomic_cas.i16 little v3, v1, v2
|
|
return v4
|
|
}
|
|
|
|
; stmg %r11, %r15, 88(%r15)
|
|
; block0:
|
|
; sllk %r11, %r5, 3
|
|
; nill %r5, 65532
|
|
; lrvr %r2, %r3
|
|
; lrvr %r3, %r4
|
|
; l %r0, 0(%r5)
|
|
; 0: rll %r1, %r0, 16(%r11) ; rxsbg %r1, %r2, 176, 64, 48 ; jglh 1f ; risbgn %r1, %r3, 48, 64, 48 ; rll %r1, %r1, 16(%r11) ; cs %r0, %r1, 0(%r5) ; jglh 0b ; 1:
|
|
; rll %r5, %r0, 0(%r11)
|
|
; lrvr %r2, %r5
|
|
; lmg %r11, %r15, 88(%r15)
|
|
; br %r14
|
|
|
|
function %atomic_cas_i8(i64, i8, i8, i64) -> i8 {
|
|
block0(v0: i64, v1: i8, v2: i8, v3: i64):
|
|
v4 = atomic_cas.i8 little v3, v1, v2
|
|
return v4
|
|
}
|
|
|
|
; stmg %r10, %r15, 80(%r15)
|
|
; block0:
|
|
; lgr %r10, %r3
|
|
; sllk %r3, %r5, 3
|
|
; nill %r5, 65532
|
|
; lcr %r2, %r3
|
|
; l %r0, 0(%r5)
|
|
; 0: rll %r1, %r0, 0(%r3) ; rxsbg %r1, %r10, 160, 40, 24 ; jglh 1f ; risbgn %r1, %r4, 32, 40, 24 ; rll %r1, %r1, 0(%r2) ; cs %r0, %r1, 0(%r5) ; jglh 0b ; 1:
|
|
; rll %r2, %r0, 8(%r3)
|
|
; lmg %r10, %r15, 80(%r15)
|
|
; br %r14
|
|
|