cb48ea406e
This PR switches the default backend on x86, for both the `cranelift-codegen` crate and for Wasmtime, to the new (`MachInst`-style, `VCode`-based) backend that has been under development and testing for some time now. The old backend is still available by default in builds with the `old-x86-backend` feature, or by requesting `BackendVariant::Legacy` from the appropriate APIs. As part of that switch, it adds some more runtime-configurable plumbing to the testing infrastructure so that tests can be run using the appropriate backend. `clif-util test` is now capable of parsing a backend selector option from filetests and instantiating the correct backend. CI has been updated so that the old x86 backend continues to run its tests, just as we used to run the new x64 backend separately. At some point, we will remove the old x86 backend entirely, once we are satisfied that the new backend has not caused any unforeseen issues and we do not need to revert.
69 lines
2.3 KiB
Plaintext
69 lines
2.3 KiB
Plaintext
test compile
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target x86_64 legacy haswell
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;; `b1` return values need to be legalized into bytes so that they can be stored
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;; in memory.
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function %return_4_b1s(b1, b1, b1, b1) -> b1, b1, b1, b1 {
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;; check: function %return_4_b1s(b1 [%rsi], b1 [%rdx], b1 [%rcx], b1 [%r8], i64 sret [%rdi], i64 fp [%rbp]) -> i64 sret [%rax], i64 fp [%rbp] fast {
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block0(v0: b1, v1: b1, v2: b1, v3: b1):
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; check: block0(v0: b1 [%rsi], v1: b1 [%rdx], v2: b1 [%rcx], v3: b1 [%r8], v4: i64 [%rdi], v13: i64 [%rbp]):
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return v0, v1, v2, v3
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; check: v5 = bint.i8 v0
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; nextln: v9 = uextend.i32 v5
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; nextln: istore8 notrap aligned v9, v4
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; nextln: v6 = bint.i8 v1
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; nextln: v10 = uextend.i32 v6
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; nextln: istore8 notrap aligned v10, v4+1
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; nextln: v7 = bint.i8 v2
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; nextln: v11 = uextend.i32 v7
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; nextln: istore8 notrap aligned v11, v4+2
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; nextln: v8 = bint.i8 v3
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; nextln: v12 = uextend.i32 v8
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; nextln: istore8 notrap aligned v12, v4+3
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}
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function %call_4_b1s() {
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; check: function %call_4_b1s(i64 fp [%rbp], i64 csr [%rbx]) -> i64 fp [%rbp], i64 csr [%rbx] fast {
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; nextln: ss0 = sret_slot 4, offset -28
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fn0 = colocated %return_4_b1s(b1, b1, b1, b1) -> b1, b1, b1, b1
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; check: sig0 = (b1 [%rsi], b1 [%rdx], b1 [%rcx], b1 [%r8], i64 sret [%rdi]) -> i64 sret [%rax] fast
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block0:
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; check: block0(v26: i64 [%rbp], v27: i64 [%rbx]):
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v0 = bconst.b1 true
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v1 = bconst.b1 false
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v2 = bconst.b1 true
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v3 = bconst.b1 false
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; check: v8 = stack_addr.i64 ss0
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v4, v5, v6, v7 = call fn0(v0, v1, v2, v3)
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; check: v9 = call fn0(v0, v1, v2, v3, v8)
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; nextln: v22 = uload8.i32 notrap aligned v9
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; nextln: v10 = ireduce.i8 v22
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; nextln: v11 = raw_bitcast.b8 v10
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; nextln: v12 = breduce.b1 v11
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; nextln: v4 -> v12
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; nextln: v23 = uload8.i32 notrap aligned v9+1
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; nextln: v13 = ireduce.i8 v23
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; nextln: v14 = raw_bitcast.b8 v13
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; nextln: v15 = breduce.b1 v14
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; nextln: v5 -> v15
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; nextln: v24 = uload8.i32 notrap aligned v9+2
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; nextln: v16 = ireduce.i8 v24
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; nextln: v17 = raw_bitcast.b8 v16
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; nextln: v18 = breduce.b1 v17
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; nextln: v6 -> v18
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; nextln: v25 = uload8.i32 notrap aligned v9+3
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; nextln: v19 = ireduce.i8 v25
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; nextln: v20 = raw_bitcast.b8 v19
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; nextln: v21 = breduce.b1 v20
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; nextln: v7 -> v21
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return
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}
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