230e2135d6
* Cranelift: remove non-egraphs optimization pipeline and `use_egraphs` option. This PR removes the LICM, GVN, and preopt passes, and associated support pieces, from `cranelift-codegen`. Not to worry, we still have optimizations: the egraph framework subsumes all of these, and has been on by default since #5181. A few decision points: - Filetests for the legacy LICM, GVN and simple_preopt were removed too. As we built optimizations in the egraph framework we wrote new tests for the equivalent functionality, and many of the old tests were testing specific behaviors in the old implementations that may not be relevant anymore. However if folks prefer I could take a different approach here and try to port over all of the tests. - The corresponding filetest modes (commands) were deleted too. The `test alias_analysis` mode remains, but no longer invokes a separate GVN first (since there is no separate GVN that will not also do alias analysis) so the tests were tweaked slightly to work with that. The egrpah testsuite also covers alias analysis. - The `divconst_magic_numbers` module is removed since it's unused without `simple_preopt`, though this is the one remaining optimization we still need to build in the egraphs framework, pending #5908. The magic numbers will live forever in git history so removing this in the meantime is not a major issue IMHO. - The `use_egraphs` setting itself was removed at both the Cranelift and Wasmtime levels. It has been marked deprecated for a few releases now (Wasmtime 6.0, 7.0, upcoming 8.0, and corresponding Cranelift versions) so I think this is probably OK. As an alternative if anyone feels strongly, we could leave the setting and make it a no-op. * Update test outputs for remaining test differences.
848 lines
14 KiB
Plaintext
848 lines
14 KiB
Plaintext
test compile precise-output
|
|
set unwind_info=false
|
|
target riscv64
|
|
|
|
function %f1(i64) -> i64 {
|
|
fn0 = %g(i64) -> i64
|
|
|
|
block0(v0: i64):
|
|
v1 = call fn0(v0)
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; load_sym a1,%g+0
|
|
; callind a1
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; auipc a1, 0
|
|
; ld a1, 0xc(a1)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a1
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f2(i32) -> i64 {
|
|
fn0 = %g(i32 uext) -> i64
|
|
|
|
block0(v0: i32):
|
|
v1 = call fn0(v0)
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; slli a0,a0,32; srli a0,a0,32
|
|
; load_sym a2,%g+0
|
|
; callind a2
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; slli a0, a0, 0x20
|
|
; srli a0, a0, 0x20
|
|
; auipc a2, 0
|
|
; ld a2, 0xc(a2)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a2
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f3(i32) -> i32 uext {
|
|
block0(v0: i32):
|
|
return v0
|
|
}
|
|
|
|
; VCode:
|
|
; block0:
|
|
; slli a0,a0,32; srli a0,a0,32
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; slli a0, a0, 0x20
|
|
; srli a0, a0, 0x20
|
|
; ret
|
|
|
|
function %f4(i32) -> i64 {
|
|
fn0 = %g(i32 sext) -> i64
|
|
|
|
block0(v0: i32):
|
|
v1 = call fn0(v0)
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; slli a0,a0,32; srai a0,a0,32
|
|
; load_sym a2,%g+0
|
|
; callind a2
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; slli a0, a0, 0x20
|
|
; srai a0, a0, 0x20
|
|
; auipc a2, 0
|
|
; ld a2, 0xc(a2)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a2
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f5(i32) -> i32 sext {
|
|
block0(v0: i32):
|
|
return v0
|
|
}
|
|
|
|
; VCode:
|
|
; block0:
|
|
; slli a0,a0,32; srai a0,a0,32
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; slli a0, a0, 0x20
|
|
; srai a0, a0, 0x20
|
|
; ret
|
|
|
|
function %f6(i8) -> i64 {
|
|
fn0 = %g(i32, i32, i32, i32, i32, i32, i32, i32, i8 sext) -> i64
|
|
|
|
block0(v0: i8):
|
|
v1 = iconst.i32 42
|
|
v2 = call fn0(v1, v1, v1, v1, v1, v1, v1, v1, v0)
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; li a7,42
|
|
; add sp,-16
|
|
; virtual_sp_offset_adj +16
|
|
; slli a2,a0,56; srai a2,a2,56
|
|
; sd a2,0(sp)
|
|
; load_sym t3,%g+0
|
|
; mv a0,a7
|
|
; mv a1,a7
|
|
; mv a2,a7
|
|
; mv a3,a7
|
|
; mv a4,a7
|
|
; mv a5,a7
|
|
; mv a6,a7
|
|
; callind t3
|
|
; add sp,+16
|
|
; virtual_sp_offset_adj -16
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; addi a7, zero, 0x2a
|
|
; addi sp, sp, -0x10
|
|
; slli a2, a0, 0x38
|
|
; srai a2, a2, 0x38
|
|
; sd a2, 0(sp)
|
|
; auipc t3, 0
|
|
; ld t3, 0xc(t3)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; ori a0, a7, 0
|
|
; ori a1, a7, 0
|
|
; ori a2, a7, 0
|
|
; ori a3, a7, 0
|
|
; ori a4, a7, 0
|
|
; ori a5, a7, 0
|
|
; ori a6, a7, 0
|
|
; jalr t3
|
|
; addi sp, sp, 0x10
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f7(i8) -> i32, i32, i32, i32, i32, i32, i32, i32, i8 sext {
|
|
block0(v0: i8):
|
|
v1 = iconst.i32 42
|
|
return v1, v1, v1, v1, v1, v1, v1, v1, v0
|
|
}
|
|
|
|
; VCode:
|
|
; block0:
|
|
; mv a2,a1
|
|
; li a1,42
|
|
; mv a3,a2
|
|
; sw a1,0(a3)
|
|
; sw a1,8(a3)
|
|
; sw a1,16(a3)
|
|
; sw a1,24(a3)
|
|
; sw a1,32(a3)
|
|
; sw a1,40(a3)
|
|
; slli a7,a0,56; srai a7,a7,56
|
|
; sd a0,48(a3)
|
|
; mv a0,a1
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; ori a2, a1, 0
|
|
; addi a1, zero, 0x2a
|
|
; ori a3, a2, 0
|
|
; sw a1, 0(a3)
|
|
; sw a1, 8(a3)
|
|
; sw a1, 0x10(a3)
|
|
; sw a1, 0x18(a3)
|
|
; sw a1, 0x20(a3)
|
|
; sw a1, 0x28(a3)
|
|
; slli a7, a0, 0x38
|
|
; srai a7, a7, 0x38
|
|
; sd a0, 0x30(a3)
|
|
; ori a0, a1, 0
|
|
; ret
|
|
|
|
function %f8() {
|
|
fn0 = %g0() -> f32
|
|
fn1 = %g1() -> f64
|
|
fn2 = %g2()
|
|
fn3 = %g3(f32)
|
|
fn4 = %g4(f64)
|
|
|
|
block0:
|
|
v0 = call fn0()
|
|
v1 = call fn1()
|
|
v2 = call fn1()
|
|
call fn2()
|
|
call fn3(v0)
|
|
call fn4(v1)
|
|
call fn4(v2)
|
|
return
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; fsd fs2,-8(sp)
|
|
; fsd fs3,-16(sp)
|
|
; fsd fs11,-24(sp)
|
|
; add sp,-32
|
|
; block0:
|
|
; load_sym a6,%g0+0
|
|
; callind a6
|
|
; fmv.d fs11,fa0
|
|
; load_sym a6,%g1+0
|
|
; callind a6
|
|
; fmv.d fs2,fa0
|
|
; load_sym a6,%g1+0
|
|
; callind a6
|
|
; fmv.d fs3,fa0
|
|
; load_sym a6,%g2+0
|
|
; callind a6
|
|
; load_sym a7,%g3+0
|
|
; fmv.d fa0,fs11
|
|
; callind a7
|
|
; load_sym t3,%g4+0
|
|
; fmv.d fa0,fs2
|
|
; callind t3
|
|
; load_sym t4,%g4+0
|
|
; fmv.d fa0,fs3
|
|
; callind t4
|
|
; add sp,+32
|
|
; fld fs2,-8(sp)
|
|
; fld fs3,-16(sp)
|
|
; fld fs11,-24(sp)
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; fsd fs2, -8(sp)
|
|
; fsd fs3, -0x10(sp)
|
|
; fsd fs11, -0x18(sp)
|
|
; addi sp, sp, -0x20
|
|
; block1: ; offset 0x20
|
|
; auipc a6, 0
|
|
; ld a6, 0xc(a6)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g0 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a6
|
|
; fmv.d fs11, fa0
|
|
; auipc a6, 0
|
|
; ld a6, 0xc(a6)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g1 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a6
|
|
; fmv.d fs2, fa0
|
|
; auipc a6, 0
|
|
; ld a6, 0xc(a6)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g1 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a6
|
|
; fmv.d fs3, fa0
|
|
; auipc a6, 0
|
|
; ld a6, 0xc(a6)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g2 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a6
|
|
; auipc a7, 0
|
|
; ld a7, 0xc(a7)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g3 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; fmv.d fa0, fs11
|
|
; jalr a7
|
|
; auipc t3, 0
|
|
; ld t3, 0xc(t3)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g4 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; fmv.d fa0, fs2
|
|
; jalr t3
|
|
; auipc t4, 0
|
|
; ld t4, 0xc(t4)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g4 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; fmv.d fa0, fs3
|
|
; jalr t4
|
|
; addi sp, sp, 0x20
|
|
; fld fs2, -8(sp)
|
|
; fld fs3, -0x10(sp)
|
|
; fld fs11, -0x18(sp)
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f11(i128, i64) -> i64 {
|
|
block0(v0: i128, v1: i64):
|
|
v2, v3 = isplit v0
|
|
return v3
|
|
}
|
|
|
|
; VCode:
|
|
; block0:
|
|
; mv a0,a1
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; ori a0, a1, 0
|
|
; ret
|
|
|
|
function %f11_call(i64) -> i64 {
|
|
fn0 = %f11(i128, i64) -> i64
|
|
|
|
block0(v0: i64):
|
|
v1 = iconst.i64 42
|
|
v2 = iconcat v1, v0
|
|
v3 = call fn0(v2, v1)
|
|
return v3
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; mv a4,a0
|
|
; li a2,42
|
|
; mv a0,a2
|
|
; mv a1,a4
|
|
; load_sym a3,%f11+0
|
|
; callind a3
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; ori a4, a0, 0
|
|
; addi a2, zero, 0x2a
|
|
; ori a0, a2, 0
|
|
; ori a1, a4, 0
|
|
; auipc a3, 0
|
|
; ld a3, 0xc(a3)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f11 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a3
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f12(i64, i128) -> i64 {
|
|
block0(v0: i64, v1: i128):
|
|
v2, v3 = isplit v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; block0:
|
|
; mv a0,a1
|
|
; mv a1,a2
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; ori a0, a1, 0
|
|
; ori a1, a2, 0
|
|
; ret
|
|
|
|
function %f12_call(i64) -> i64 {
|
|
fn0 = %f12(i64, i128) -> i64
|
|
|
|
block0(v0: i64):
|
|
v1 = iconst.i64 42
|
|
v2 = iconcat v0, v1
|
|
v3 = call fn0(v1, v2)
|
|
return v3
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; mv a4,a0
|
|
; li a0,42
|
|
; mv a1,a4
|
|
; mv a2,a0
|
|
; load_sym a3,%f12+0
|
|
; callind a3
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; ori a4, a0, 0
|
|
; addi a0, zero, 0x2a
|
|
; ori a1, a4, 0
|
|
; ori a2, a0, 0
|
|
; auipc a3, 0
|
|
; ld a3, 0xc(a3)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f12 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a3
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f13(i64, i128) -> i64 {
|
|
block0(v0: i64, v1: i128):
|
|
v2, v3 = isplit v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; block0:
|
|
; mv a0,a1
|
|
; mv a1,a2
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; ori a0, a1, 0
|
|
; ori a1, a2, 0
|
|
; ret
|
|
|
|
function %f13_call(i64) -> i64 {
|
|
fn0 = %f13(i64, i128) -> i64
|
|
|
|
block0(v0: i64):
|
|
v1 = iconst.i64 42
|
|
v2 = iconcat v0, v1
|
|
v3 = call fn0(v1, v2)
|
|
return v3
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; mv a4,a0
|
|
; li a0,42
|
|
; mv a1,a4
|
|
; mv a2,a0
|
|
; load_sym a3,%f13+0
|
|
; callind a3
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; ori a4, a0, 0
|
|
; addi a0, zero, 0x2a
|
|
; ori a1, a4, 0
|
|
; ori a2, a0, 0
|
|
; auipc a3, 0
|
|
; ld a3, 0xc(a3)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f13 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; jalr a3
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f14(i128, i128, i128, i64, i128) -> i128 {
|
|
block0(v0: i128, v1: i128, v2: i128, v3: i64, v4: i128):
|
|
return v4
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; mv a0,a7
|
|
; ld a1,16(fp)
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; ori a0, a7, 0
|
|
; ld a1, 0x10(s0)
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f14_call(i128, i64) -> i128 {
|
|
fn0 = %f14(i128, i128, i128, i64, i128) -> i128
|
|
|
|
block0(v0: i128, v1: i64):
|
|
v2 = call fn0(v0, v0, v0, v1, v0)
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; mv a7,a0
|
|
; mv a6,a2
|
|
; add sp,-16
|
|
; virtual_sp_offset_adj +16
|
|
; sd a1,0(sp)
|
|
; mv a5,a1
|
|
; load_sym t3,%f14+0
|
|
; mv a1,a5
|
|
; mv a3,a5
|
|
; mv a0,a7
|
|
; mv a2,a7
|
|
; mv a4,a7
|
|
; callind t3
|
|
; add sp,+16
|
|
; virtual_sp_offset_adj -16
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; ori a7, a0, 0
|
|
; ori a6, a2, 0
|
|
; addi sp, sp, -0x10
|
|
; sd a1, 0(sp)
|
|
; ori a5, a1, 0
|
|
; auipc t3, 0
|
|
; ld t3, 0xc(t3)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f14 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; ori a1, a5, 0
|
|
; ori a3, a5, 0
|
|
; ori a0, a7, 0
|
|
; ori a2, a7, 0
|
|
; ori a4, a7, 0
|
|
; jalr t3
|
|
; addi sp, sp, 0x10
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f15(i128, i128, i128, i64, i128) -> i128{
|
|
block0(v0: i128, v1: i128, v2: i128, v3: i64, v4: i128):
|
|
return v4
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; mv a0,a7
|
|
; ld a1,16(fp)
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; ori a0, a7, 0
|
|
; ld a1, 0x10(s0)
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f15_call(i128, i64) -> i128 {
|
|
fn0 = %f15(i128, i128, i128, i64, i128) -> i128
|
|
|
|
block0(v0: i128, v1: i64):
|
|
v2 = call fn0(v0, v0, v0, v1, v0)
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; block0:
|
|
; mv a7,a0
|
|
; mv a6,a2
|
|
; add sp,-16
|
|
; virtual_sp_offset_adj +16
|
|
; sd a1,0(sp)
|
|
; mv a5,a1
|
|
; load_sym t3,%f15+0
|
|
; mv a1,a5
|
|
; mv a3,a5
|
|
; mv a0,a7
|
|
; mv a2,a7
|
|
; mv a4,a7
|
|
; callind t3
|
|
; add sp,+16
|
|
; virtual_sp_offset_adj -16
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; block1: ; offset 0x10
|
|
; ori a7, a0, 0
|
|
; ori a6, a2, 0
|
|
; addi sp, sp, -0x10
|
|
; sd a1, 0(sp)
|
|
; ori a5, a1, 0
|
|
; auipc t3, 0
|
|
; ld t3, 0xc(t3)
|
|
; j 0xc
|
|
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f15 0
|
|
; .byte 0x00, 0x00, 0x00, 0x00
|
|
; ori a1, a5, 0
|
|
; ori a3, a5, 0
|
|
; ori a0, a7, 0
|
|
; ori a2, a7, 0
|
|
; ori a4, a7, 0
|
|
; jalr t3
|
|
; addi sp, sp, 0x10
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|
|
function %f16() -> i32, i32 {
|
|
block0:
|
|
v0 = iconst.i32 0
|
|
v1 = iconst.i32 1
|
|
return v0, v1
|
|
}
|
|
|
|
; VCode:
|
|
; block0:
|
|
; li a0,0
|
|
; li a1,1
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; mv a0, zero
|
|
; addi a1, zero, 1
|
|
; ret
|
|
|
|
|
|
|
|
function %call_colocated(i16) -> i16 {
|
|
sig0 = () system_v
|
|
fn0 = colocated u0:0 sig0
|
|
|
|
block0(v0: i16):
|
|
call fn0()
|
|
return v0
|
|
}
|
|
|
|
; VCode:
|
|
; add sp,-16
|
|
; sd ra,8(sp)
|
|
; sd fp,0(sp)
|
|
; mv fp,sp
|
|
; sd s3,-8(sp)
|
|
; add sp,-16
|
|
; block0:
|
|
; mv s3,a0
|
|
; call userextname0
|
|
; mv a0,s3
|
|
; add sp,+16
|
|
; ld s3,-8(sp)
|
|
; ld ra,8(sp)
|
|
; ld fp,0(sp)
|
|
; add sp,+16
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; addi sp, sp, -0x10
|
|
; sd ra, 8(sp)
|
|
; sd s0, 0(sp)
|
|
; ori s0, sp, 0
|
|
; sd s3, -8(sp)
|
|
; addi sp, sp, -0x10
|
|
; block1: ; offset 0x18
|
|
; ori s3, a0, 0
|
|
; auipc ra, 0 ; reloc_external RiscvCall u0:0 0
|
|
; jalr ra
|
|
; ori a0, s3, 0
|
|
; addi sp, sp, 0x10
|
|
; ld s3, -8(sp)
|
|
; ld ra, 8(sp)
|
|
; ld s0, 0(sp)
|
|
; addi sp, sp, 0x10
|
|
; ret
|
|
|