I hadn't realized before that the filetest backend for `test vcode` is doing essentially what `compile` is doing, but for new (`MachInst`) backends: it is just getting a disassembly and running it through filecheck. There's no reason not to reuse `test compile` for the AArch64 tests as well. This was motivated by the desire to have "this IR compiles successfully" tests work on both x86 and AArch64. It seems this should work fine by adding multiple `target` directives when a test case should be compile-tested on multiple architectures.
68 lines
1.2 KiB
Plaintext
68 lines
1.2 KiB
Plaintext
test compile
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target aarch64
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function %f(i64, i64) -> b1 {
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block0(v0: i64, v1: i64):
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v2 = icmp eq v0, v1
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return v2
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: subs xzr, x0, x1
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; nextln: cset x0, eq
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f(i64, i64) -> i64 {
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block0(v0: i64, v1: i64):
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v2 = ifcmp v0, v1
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brif eq v2, block1
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jump block2
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block1:
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v4 = iconst.i64 1
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return v4
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block2:
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v5 = iconst.i64 2
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return v5
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}
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; check: Block 0:
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: subs xzr, x0, x1
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; nextln: b.eq label1 ; b label2
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; check: Block 1:
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; check: movz x0, #1
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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; check: Block 2:
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; check: movz x0, #2
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f(i64, i64) -> i64 {
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block0(v0: i64, v1: i64):
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v2 = ifcmp v0, v1
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brif eq v2, block1
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jump block1
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block1:
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v4 = iconst.i64 1
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return v4
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: subs xzr, x0, x1
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; check: Block 1:
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; check: movz x0, #1
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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