Benjamin Bouvier 22892466e7 machinst x64: fix implementation of *reduce; ...

They should just generate a plain move, since the high bits are then
ignored, and not an extended move.

2020-07-16 18:21:06 +02:00

..

aarch64

Encode [u|s]widen_low for x86

2020-07-15 11:32:08 -07:00

arm32

Add TargetIsa::as_any for downcasting to specific ISA implementations

2020-06-03 16:27:57 -07:00

riscv

Add TargetIsa::as_any for downcasting to specific ISA implementations

2020-06-03 16:27:57 -07:00

unwind

Fix module doc comment.

2020-07-06 19:02:52 -07:00

x64

machinst x64: fix implementation of *reduce;

2020-07-16 18:21:06 +02:00

x86

machinst x64: Only use the feature flag to enable the x64 new backend;

2020-07-15 13:11:28 +02:00

call_conv.rs

Write .debug_frame information (#53)

2020-03-11 10:22:51 -05:00

constraints.rs

Mass rename Ebb and relatives to Block (#1365)

2020-02-07 10:46:47 -06:00

enc_tables.rs

[meta] Remove mentions to Python in comments of the non-meta crate;

2019-07-05 17:50:17 +02:00

encoding.rs

Pass Encoding to compute_size() for runtime Encoding inspection. #1156

2019-11-08 09:08:07 -08:00

mod.rs

machinst x64: Only use the feature flag to enable the x64 new backend;

2020-07-15 13:11:28 +02:00

registers.rs

Remove dependency on hard-coded ordering of x86 register banks

2020-03-06 10:53:22 -08:00

stack.rs

Codegen: Align representation of stackmap with SpiderMonkey

2020-01-23 13:37:11 -06:00

test_utils.rs

Address review comments:

2020-04-15 17:21:28 -07:00

unwind.rs

Move UnwindInfo definition out of x86 ABI.

2020-04-16 11:15:34 -07:00