1c014d129a
Addresses #3809: when we are asked to create a Cranelift backend with shared flags that indicate support for SIMD, we should check that the ISA level needed for our SIMD lowerings is present.
34 lines
1.2 KiB
Plaintext
34 lines
1.2 KiB
Plaintext
test interpret
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test run
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target aarch64
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set enable_simd
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target x86_64 has_sse3 has_ssse3 has_sse41
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function %swizzle_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = swizzle.i8x16 v0, v1
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return v2
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}
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; run: %swizzle_i8x16([1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16], [0 9 15 1 6 13 7 11 10 8 100 12 4 2 3 5]) == [1 10 16 2 7 14 8 12 11 9 0 13 5 3 4 6]
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function %swizzle_i16x8(i8x16, i8x16) -> i16x8 {
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block0(v0: i8x16, v1: i8x16):
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v2 = swizzle.i16x8 v0, v1
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return v2
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}
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; run: %swizzle_i16x8([1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16], [0 9 15 1 6 13 7 11 10 8 100 12 4 2 3 5]) == 0x060403050d00090b0c080e0702100a01
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function %swizzle_i32x4(i8x16, i8x16) -> i32x4 {
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block0(v0: i8x16, v1: i8x16):
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v2 = swizzle.i32x4 v0, v1
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return v2
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}
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; run: %swizzle_i32x4([1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16], [0 9 15 1 6 13 7 11 10 8 100 12 4 2 3 5]) == 0x060403050d00090b0c080e0702100a01
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function %swizzle_i64x2(i8x16, i8x16) -> i64x2 {
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block0(v0: i8x16, v1: i8x16):
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v2 = swizzle.i64x2 v0, v1
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return v2
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}
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; run: %swizzle_i64x2([1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16], [0 9 15 1 6 13 7 11 10 8 100 12 4 2 3 5]) == 0x060403050d00090b0c080e0702100a01
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