cc073593a4
As a follow-up to #5780, disassemble the regions identified by bb_starts, falling back on disassembling the whole buffer. This ensures that instructions like br_table that introduce a lot of constants don't throw off capstone for the remainder of the function. --------- Co-authored-by: Jamey Sharp <jamey@minilop.net>
208 lines
4.2 KiB
Plaintext
208 lines
4.2 KiB
Plaintext
test compile precise-output
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target s390x
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function u0:0(i64 sarg(64)) -> i8 system_v {
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block0(v0: i64):
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v1 = load.i8 v0
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return v1
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}
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; VCode:
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; block0:
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; llc %r2, 0(%r2)
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; llc %r2, 0(%r2)
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; br %r14
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function u0:1(i64 sarg(64), i64) -> i8 system_v {
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block0(v0: i64, v1: i64):
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v2 = load.i8 v1
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v3 = load.i8 v0
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v4 = iadd.i8 v2, v3
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return v4
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}
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; VCode:
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; block0:
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; llc %r3, 0(%r3)
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; llc %r4, 0(%r2)
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; ark %r2, %r3, %r4
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; llc %r3, 0(%r3)
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; llc %r4, 0(%r2)
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; ark %r2, %r3, %r4
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; br %r14
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function u0:2(i64) -> i8 system_v {
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fn1 = colocated u0:0(i64 sarg(64)) -> i8 system_v
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block0(v0: i64):
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v1 = call fn1(v0)
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return v1
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}
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; VCode:
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; stmg %r14, %r15, 112(%r15)
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; aghi %r15, -224
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; virtual_sp_offset_adjust 224
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; block0:
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; mvc 160(63,%r15), 0(%r2)
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; la %r2, 160(%r15)
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; brasl %r14, userextname0
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; lmg %r14, %r15, 336(%r15)
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stmg %r14, %r15, 0x70(%r15)
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; aghi %r15, -0xe0
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; block1: ; offset 0xa
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; mvc 0xa0(0x40, %r15), 0(%r2)
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; la %r2, 0xa0(%r15)
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; brasl %r14, 0x14 ; reloc_external PLTRel32Dbl u0:0 2
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; lmg %r14, %r15, 0x150(%r15)
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; br %r14
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function u0:3(i64, i64) -> i8 system_v {
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fn1 = colocated u0:0(i64, i64 sarg(64)) -> i8 system_v
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block0(v0: i64, v1: i64):
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v2 = call fn1(v0, v1)
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return v2
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}
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; VCode:
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; stmg %r14, %r15, 112(%r15)
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; aghi %r15, -224
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; virtual_sp_offset_adjust 224
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; block0:
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; mvc 160(63,%r15), 0(%r3)
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; la %r3, 160(%r15)
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; brasl %r14, userextname0
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; lmg %r14, %r15, 336(%r15)
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stmg %r14, %r15, 0x70(%r15)
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; aghi %r15, -0xe0
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; block1: ; offset 0xa
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; mvc 0xa0(0x40, %r15), 0(%r3)
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; la %r3, 0xa0(%r15)
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; brasl %r14, 0x14 ; reloc_external PLTRel32Dbl u0:0 2
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; lmg %r14, %r15, 0x150(%r15)
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; br %r14
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function u0:4(i64 sarg(256), i64 sarg(64)) -> i8 system_v {
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block0(v0: i64, v1: i64):
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v2 = load.i8 v0
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v3 = load.i8 v1
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v4 = iadd.i8 v2, v3
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return v4
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}
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; VCode:
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; block0:
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; lgr %r5, %r3
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; llc %r3, 0(%r2)
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; llc %r4, 0(%r5)
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; ark %r2, %r3, %r4
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lgr %r5, %r3
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; llc %r3, 0(%r2)
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; llc %r4, 0(%r5)
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; ark %r2, %r3, %r4
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; br %r14
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function u0:5(i64, i64, i64) -> i8 system_v {
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fn1 = colocated u0:0(i64, i64 sarg(256), i64 sarg(64)) -> i8 system_v
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block0(v0: i64, v1: i64, v2: i64):
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v3 = call fn1(v0, v1, v2)
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return v3
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}
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; VCode:
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; stmg %r14, %r15, 112(%r15)
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; aghi %r15, -480
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; virtual_sp_offset_adjust 480
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; block0:
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; mvc 160(255,%r15), 0(%r3)
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; mvc 416(63,%r15), 0(%r4)
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; la %r3, 160(%r15)
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; la %r4, 416(%r15)
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; brasl %r14, userextname0
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; lmg %r14, %r15, 592(%r15)
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stmg %r14, %r15, 0x70(%r15)
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; aghi %r15, -0x1e0
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; block1: ; offset 0xa
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; mvc 0xa0(0x100, %r15), 0(%r3)
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; mvc 0x1a0(0x40, %r15), 0(%r4)
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; la %r3, 0xa0(%r15)
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; la %r4, 0x1a0(%r15)
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; brasl %r14, 0x1e ; reloc_external PLTRel32Dbl u0:0 2
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; lmg %r14, %r15, 0x250(%r15)
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; br %r14
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function u0:6(i64, i64, i64) -> i8 system_v {
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fn1 = colocated u0:0(i64, i64 sarg(1024), i64 sarg(64)) -> i8 system_v
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block0(v0: i64, v1: i64, v2: i64):
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v3 = call fn1(v0, v1, v2)
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return v3
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}
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; VCode:
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; stmg %r7, %r15, 56(%r15)
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; aghi %r15, -1248
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; virtual_sp_offset_adjust 1248
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; block0:
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; lgr %r7, %r2
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; lgr %r9, %r4
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; la %r2, 160(%r15)
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; la %r3, 0(%r3)
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; lghi %r4, 1024
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; brasl %r14, %Memcpy
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; lgr %r4, %r9
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; mvc 1184(63,%r15), 0(%r4)
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; la %r3, 160(%r15)
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; la %r4, 1184(%r15)
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; lgr %r2, %r7
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; brasl %r14, userextname0
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; lmg %r7, %r15, 1304(%r15)
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stmg %r7, %r15, 0x38(%r15)
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; aghi %r15, -0x4e0
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; block1: ; offset 0xa
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; lgr %r7, %r2
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; lgr %r9, %r4
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; la %r2, 0xa0(%r15)
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; la %r3, 0(%r3)
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; lghi %r4, 0x400
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; brasl %r14, 0x1e ; reloc_external PLTRel32Dbl %Memcpy 2
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; lgr %r4, %r9
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; mvc 0x4a0(0x40, %r15), 0(%r4)
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; la %r3, 0xa0(%r15)
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; la %r4, 0x4a0(%r15)
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; lgr %r2, %r7
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; brasl %r14, 0x3a ; reloc_external PLTRel32Dbl u0:0 2
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; lmg %r7, %r15, 0x518(%r15)
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; br %r14
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