Addresses #3809: when we are asked to create a Cranelift backend with shared flags that indicate support for SIMD, we should check that the ISA level needed for our SIMD lowerings is present.
75 lines
2.6 KiB
Plaintext
75 lines
2.6 KiB
Plaintext
test interpret
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test run
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; target s390x TODO: Not yet implemented on s390x
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target aarch64
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set enable_simd
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target x86_64 has_sse3 has_ssse3 has_sse41
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function %vselect_i8x16() -> i8x16 {
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block0:
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v1 = vconst.b8x16 [false true false true false true true true true true false false false false false false]
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v2 = vconst.i8x16 [100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115]
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v3 = vconst.i8x16 [200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i8x16() == [200 101 202 103 204 105 106 107 108 109 210 211 212 213 214 215]
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function %vselect_i16x8() -> i16x8 {
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block0:
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v1 = vconst.b16x8 [false true false true false true true true]
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v2 = vconst.i16x8 [100 101 102 103 104 105 106 107]
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v3 = vconst.i16x8 [200 201 202 203 204 205 206 207]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i16x8() == [200 101 202 103 204 105 106 107]
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function %vselect_i32x4() -> i32x4 {
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block0:
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v1 = vconst.b32x4 [false true false true]
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v2 = vconst.i32x4 [100 101 102 103]
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v3 = vconst.i32x4 [200 201 202 203]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i32x4() == [200 101 202 103]
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function %vselect_i64x2() -> i64x2 {
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block0:
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v1 = vconst.b64x2 [false true]
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v2 = vconst.i64x2 [100 101]
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v3 = vconst.i64x2 [200 201]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i64x2() == [200 101]
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function %vselect_p_i8x16(b8x16, i8x16, i8x16) -> i8x16 {
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block0(v0: b8x16, v1: i8x16, v2: i8x16):
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v3 = vselect v0, v1, v2
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return v3
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}
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; run: %vselect_p_i8x16([true false true true true false false false true false true true true false false false], [1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16], [17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32]) == [1 18 3 4 5 22 23 24 9 26 11 12 13 30 31 32]
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function %vselect_p_i16x8(b16x8, i16x8, i16x8) -> i16x8 {
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block0(v0: b16x8, v1: i16x8, v2: i16x8):
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v3 = vselect v0, v1, v2
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return v3
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}
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; run: %vselect_p_i16x8([true false true true true false false false], [1 2 3 4 5 6 7 8], [17 18 19 20 21 22 23 24]) == [1 18 3 4 5 22 23 24]
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function %vselect_p_i32x4(b32x4, i32x4, i32x4) -> i32x4 {
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block0(v0: b32x4, v1: i32x4, v2: i32x4):
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v3 = vselect v0, v1, v2
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return v3
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}
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; run: %vselect_p_i32x4([true false true true], [1 2 3 4], [100000 200000 300000 400000]) == [1 200000 3 4]
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function %vselect_p_i64x2(b64x2, i64x2, i64x2) -> i64x2 {
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block0(v0: b64x2, v1: i64x2, v2: i64x2):
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v3 = vselect v0, v1, v2
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return v3
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}
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; run: %vselect_p_i64x2([true false], [1 2], [100000000000 200000000000]) == [1 200000000000]
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