Jakob Stoklund Olesen 1b6a6f4e48 Add the br_icmp instruction. ...

This instruction behaves like icmp fused with brnz, and it can be used
to represent fused compare+branch instruction on Intel when optimizing
for macro-op fusion.

RISC-V provides compare-and-branch instructions directly, and it is
needed there too.

2017-04-03 15:04:42 -07:00

..

base

Add the br_icmp instruction.

2017-04-03 15:04:42 -07:00

cdsl

Give singleton type variables the type's doc string.

2017-04-03 10:06:08 -07:00

isa

Add RISC-V encodings for lui.

2017-04-03 12:27:22 -07:00

build.py

Add a mypy.ini file and enable some more warnings.

2017-03-30 19:52:49 -07:00

check.sh

Run Python checks from test-all.sh

2017-01-25 14:12:36 -08:00

constant_hash.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

gen_binemit.py

Generate binemit::emit_inst() functions.

2017-03-28 14:44:36 -07:00

gen_build_deps.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

gen_encoding.py

Add InstructionFormat.imm_fields.

2017-03-31 13:46:39 -07:00

gen_instr.py

Add InstructionFormat.imm_fields.

2017-03-31 13:46:39 -07:00

gen_legalizer.py

Add Apply.inst_predicate().

2017-03-31 13:46:39 -07:00

gen_registers.py

Implement legalize_signature for RISC-V.

2017-03-03 11:09:55 -08:00

gen_settings.py

Add mypy types for gen_settings.py.

2017-03-30 18:42:06 -07:00

gen_types.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

mypy.ini

Add a mypy.ini file and enable some more warnings.

2017-03-30 19:52:49 -07:00

srcgen.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

test_constant_hash.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

test_srcgen.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

unique_table.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00