4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
14 lines
315 B
Plaintext
14 lines
315 B
Plaintext
test regalloc
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target i686
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; %rdi can't be used in a movsbl instruction, so test that the register
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; allocator can move it to a register that can be.
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function %test(i32 [%rdi]) -> i32 system_v {
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ebb0(v0: i32 [%rdi]):
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v1 = ireduce.i8 v0
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v2 = sextend.i32 v1
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return v2
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}
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; check: regmove v1, %rdi -> %rax
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