4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
16 lines
559 B
Plaintext
16 lines
559 B
Plaintext
; Test tracking of register moves.
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test binemit
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target riscv32
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function %regmoves(i32 link [%x1]) -> i32 link [%x1] {
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ebb0(v9999: i32):
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[-,%x10] v1 = iconst.i32 1
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[-,%x7] v2 = iadd_imm v1, 1000 ; bin: 3e850393
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regmove v1, %x10 -> %x11 ; bin: 00050593
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[-,%x7] v3 = iadd_imm v1, 1000 ; bin: 3e858393
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regmove v1, %x11 -> %x10 ; bin: 00058513
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[-,%x7] v4 = iadd_imm v1, 1000 ; bin: 3e850393
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return v9999
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}
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