Jakob Stoklund Olesen 175b269760 Add RISC-V encodings for lui. ...

This instruction can materialize constants with the low 12 bits clear.

2017-04-03 12:27:22 -07:00

..

arm32

Add a section about implementation limits.

2017-02-24 11:08:15 -08:00

arm64

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

intel

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

riscv

Add RISC-V encodings for lui.

2017-04-03 12:27:22 -07:00

__init__.py

Fixed for mypy 0.501.

2017-03-03 09:08:28 -08:00