Jakob Stoklund Olesen ba52a38597 Add a t8jccd_long encoding recipe for brz.b1 and brnz.b1 in 32-bit mode. ...

The register allocator can't handle branches with constrained register
operands, and the brz.b1/brnz.b1 instructions only have the t8jccd_abcd
in 32-bit mode where no REX prefixes are possible.

This adds a worst case encoding for those cases where a b1 value lives
in a non-ABCD register.

2017-10-11 14:20:43 -07:00

..

intel

Add a t8jccd_long encoding recipe for brz.b1 and brnz.b1 in 32-bit mode.

2017-10-11 14:20:43 -07:00

riscv

Make the verifier accept any of the legal encodings of an instruction

2017-09-18 13:00:19 -07:00