a1b39276e1
The tests for the SIMD floating-point maximum and minimum operations require particular care because the handling of the NaN values is non-deterministic and may vary between platforms. There is no way to match several NaN values in a test, so the solution is to extract the non-deterministic test cases into a separate file that is subsequently replicated for every backend under test, with adjustments made to the expected results. Copyright (c) 2021, Arm Limited.
52 lines
1.4 KiB
Plaintext
52 lines
1.4 KiB
Plaintext
test simple_preopt
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target aarch64
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target x86_64
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;; Test replacement of bitselect with vselect for special masks
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function %mask_from_icmp(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = icmp eq v0, v1
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v3 = raw_bitcast.i8x16 v2
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v4 = bitselect v3, v0, v1
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; check: v4 = vselect v2, v0, v1
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return v4
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}
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function %mask_casted(i8x16, i8x16, i32x4) -> i8x16 {
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block0(v0: i8x16, v1: i8x16, v2: i32x4):
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v3 = raw_bitcast.i8x16 v2
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v4 = bitselect v3, v0, v1
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; check: v4 = bitselect v3, v0, v1
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return v4
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}
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function %good_const_mask_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v3 = vconst.i8x16 [0 0 0xFF 0 0 0xFF 0 0 0 0 0xFF 0 0 0 0 0xFF]
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v4 = bitselect v3, v0, v1
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; check: v5 = raw_bitcast.b8x16 v3
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; nextln: v4 = vselect v5, v0, v1
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return v4
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}
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function %good_const_mask_i16x8(i16x8, i16x8) -> i16x8 {
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block0(v0: i16x8, v1: i16x8):
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v3 = vconst.i16x8 [0x0000 0xFF00 0x0000 0x00FF 0x0000 0xFFFF 0x00FF 0xFFFF]
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v4 = bitselect v3, v0, v1
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; check: v5 = raw_bitcast.b8x16 v3
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; nextln: v6 = raw_bitcast.i8x16 v0
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; nextln: v7 = raw_bitcast.i8x16 v1
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; nextln: v8 = vselect v5, v6, v7
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; nextln: v4 = raw_bitcast.i16x8 v8
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return v4
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}
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function %bad_const_mask(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v3 = vconst.i8x16 [0 0 0xF0 0 0 0xFF 0 0 0 0 0xFF 0 0 0 0 0xFF]
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v4 = bitselect v3, v0, v1
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; check: v4 = bitselect v3, v0, v1
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return v4
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}
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