132 lines
2.7 KiB
Plaintext
132 lines
2.7 KiB
Plaintext
test interpret
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test run
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target aarch64
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target aarch64 use_bti
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target x86_64
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target s390x
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target riscv64
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function %br_table_i32(i32) -> i32 {
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block0(v0: i32):
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br_table v0, block4, [block1, block2, block2, block3]
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block1:
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v1 = iconst.i32 1
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jump block5(v1)
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block2:
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v2 = iconst.i32 2
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jump block5(v2)
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block3:
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v3 = iconst.i32 3
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jump block5(v3)
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block4:
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v4 = iconst.i32 4
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jump block5(v4)
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block5(v5: i32):
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v6 = iadd.i32 v0, v5
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return v6
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}
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; run: %br_table_i32(0) == 1
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; run: %br_table_i32(1) == 3
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; run: %br_table_i32(2) == 4
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; run: %br_table_i32(3) == 6
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; run: %br_table_i32(4) == 8
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; run: %br_table_i32(5) == 9
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; run: %br_table_i32(6) == 10
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; run: %br_table_i32(-1) == 3
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; RISC-V had a bug where having a br_table on a cold block would cause a segfault
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; See #5496 for more details.
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function %br_table_cold_block(i32) -> i32 system_v {
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block0(v0: i32):
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jump block1
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block1 cold:
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br_table v0, block2, []
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block2:
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v1 = iconst.i32 0
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return v1
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}
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; run: %br_table_cold_block(0) == 0
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; run: %br_table_cold_block(1) == 0
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function %br_table_i32_inline(i32) -> i32 {
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block0(v0: i32):
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v1 = iconst.i32 1
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v2 = iconst.i32 2
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v3 = iconst.i32 3
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v4 = iconst.i32 4
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br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)]
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block1(v5: i32):
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return v5
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}
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; run: %br_table_i32_inline(0) == 1
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; run: %br_table_i32_inline(1) == 2
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; run: %br_table_i32_inline(2) == 2
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; run: %br_table_i32_inline(3) == 3
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; run: %br_table_i32_inline(4) == 4
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; run: %br_table_i32_inline(297) == 4
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; run: %br_table_i32_inline(65535) == 4
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function %br_table_i32_inline_varied(i32) -> i32 {
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block0(v0: i32):
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v1 = iconst.i32 1
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v2 = iconst.i32 2
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v3 = iconst.i32 3
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v4 = iconst.i32 4
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br_table v0, block1(v4), [block1(v1), block2(v2, v4), block2(v4, v3), block1(v3)]
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block2(v6: i32, v7: i32):
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v8 = iadd v6, v7
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jump block1(v8)
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block1(v5: i32):
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return v5
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}
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; run: %br_table_i32_inline_varied(0) == 1
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; run: %br_table_i32_inline_varied(1) == 6
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; run: %br_table_i32_inline_varied(2) == 7
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; run: %br_table_i32_inline_varied(3) == 3
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; run: %br_table_i32_inline_varied(4) == 4
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; run: %br_table_i32_inline_varied(297) == 4
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; run: %br_table_i32_inline_varied(65535) == 4
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; This is a regression test for #5831.
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; The riscv64 backend was failing to clear the upper half of the
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; index register on a br_table, which caused it to jump to the wrong
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; block.
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function %br_table_upper_reg() -> i32 {
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block0:
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v0 = iconst.i32 -555163938
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v1 = iconst.i8 -34
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jump block1(v0, v1)
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block1(v2: i32, v3: i8):
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v4 = ishl.i32 v2, v2
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v5 = rotr v4, v3
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br_table v5, block2, [block2, block2, block3]
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block2 cold:
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v100 = iconst.i32 100
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return v100
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block3 cold:
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v200 = iconst.i32 200
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return v200
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}
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; run: %br_table_upper_reg() == 200
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