32a7593c94
Remove the boolean types from cranelift, and the associated instructions breduce, bextend, bconst, and bint. Standardize on using 1/0 for the return value from instructions that produce scalar boolean results, and -1/0 for boolean vector elements. Fixes #3205 Co-authored-by: Afonso Bordado <afonso360@users.noreply.github.com> Co-authored-by: Ulrich Weigand <ulrich.weigand@de.ibm.com> Co-authored-by: Chris Fallin <chris@cfallin.org>
141 lines
3.3 KiB
Plaintext
141 lines
3.3 KiB
Plaintext
test interpret
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test run
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target aarch64
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target s390x
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target x86_64
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target riscv64
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function %select_eq_f32(f32, f32) -> i32 {
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block0(v0: f32, v1: f32):
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v2 = fcmp eq v0, v1
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v3 = iconst.i32 1
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v4 = iconst.i32 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_eq_f32(0x42.42, 0x42.42) == 1
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; run: %select_eq_f32(0x42.42, 0.0) == 0
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; run: %select_eq_f32(0x42.42, NaN) == 0
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function %select_i8(i8) -> i32 {
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block0(v0: i8):
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v1 = iconst.i32 42
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v2 = iconst.i32 97
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v3 = select v0, v1, v2
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return v3
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}
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; run: %select_i8(0) == 97
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; run: %select_i8(1) == 42
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; run: %select_i8(2) == 42
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; run: %select_i8(-1) == 42
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function %select_ne_f64(f64, f64) -> i32 {
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block0(v0: f64, v1: f64):
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v2 = fcmp ne v0, v1
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v3 = iconst.i32 1
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v4 = iconst.i32 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_ne_f64(0x42.42, 0x42.42) == 0
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; run: %select_ne_f64(0x42.42, 0.0) == 1
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; run: %select_ne_f64(NaN, NaN) == 1
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function %select_gt_f64(f64, f64) -> i8 {
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block0(v0: f64, v1: f64):
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v2 = fcmp gt v0, v1
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v3 = iconst.i8 1
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v4 = iconst.i8 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_gt_f64(0x42.42, 0.0) == 1
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; run: %select_gt_f64(0.0, 0.0) == 0
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; run: %select_gt_f64(0x0.0, 0x42.42) == 0
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; run: %select_gt_f64(NaN, 0x42.42) == 0
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function %select_ge_f64(f64, f64) -> i64 {
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block0(v0: f64, v1: f64):
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v2 = fcmp ge v0, v1
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v3 = iconst.i64 1
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v4 = iconst.i64 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_ge_f64(0x42.42, 0.0) == 1
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; run: %select_ge_f64(0.0, 0.0) == 1
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; run: %select_ge_f64(0x0.0, 0x42.42) == 0
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; run: %select_ge_f64(0x0.0, NaN) == 0
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function %select_le_f32(f32, f32) -> f32 {
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block0(v0: f32, v1: f32):
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v2 = fcmp le v0, v1
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v3 = f32const 0x1.0
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v4 = f32const 0x0.0
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v5 = select v2, v3, v4
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return v5
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}
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; runx: %select_le_f32(0x42.42, 0.0) == 0x0.0
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; run: %select_le_f32(0.0, 0.0) == 0x1.0
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; run: %select_le_f32(0x0.0, 0x42.42) == 0x1.0
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; run: %select_le_f32(0x0.0, NaN) == 0x0.0
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function %select_uno_f32(f32, f32) -> i8 {
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block0(v0: f32, v1: f32):
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v2 = fcmp uno v0, v1
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v3 = iconst.i8 1
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v4 = iconst.i8 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_uno_f32(0x42.42, 0.0) == 0
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; run: %select_uno_f32(0.0, 0.0) == 0
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; run: %select_uno_f32(0x0.0, 0x42.42) == 0
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; run: %select_uno_f32(0x0.0, NaN) == 1
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; run: %select_uno_f32(-NaN, 0x42.42) == 1
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function %select_overflow_i8(i8) -> i8 {
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block0(v0: i8):
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v1 = iconst.i8 255
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v2 = iadd v0, v1
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v3 = iconst.i8 1
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v4 = iconst.i8 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_overflow_i8(0) == 1
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; run: %select_overflow_i8(2) == 1
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; run: %select_overflow_i8(1) == 0
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; run: %select_overflow_i8(98) == 1
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function %select_overflow_i16(i16) -> i8 {
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block0(v0: i16):
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v1 = iconst.i16 65535
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v2 = iadd v0, v1
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v3 = iconst.i8 1
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v4 = iconst.i8 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_overflow_i16(0) == 1
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; run: %select_overflow_i16(2) == 1
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; run: %select_overflow_i16(1) == 0
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; run: %select_overflow_i16(98) == 1
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function %select_overflow_i32(i32) -> i8 {
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block0(v0: i32):
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v1 = iconst.i32 4294967295
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v2 = iadd v0, v1
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v3 = iconst.i8 1
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v4 = iconst.i8 0
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v5 = select v2, v3, v4
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return v5
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}
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; run: %select_overflow_i32(0) == 1
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; run: %select_overflow_i32(2) == 1
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; run: %select_overflow_i32(1) == 0
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; run: %select_overflow_i32(98) == 1
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