0ec7b872fa
* x64: Optimize store-of-extract-lane-0 The `movss` and `movsd` instructions can be used to store the 0th lane of a `t32x4` or a `t64x2` vector into memory, enabling fusing a `store` and an `extractlane` instruction. * Fix merge conflict with `main`
258 lines
4.1 KiB
Plaintext
258 lines
4.1 KiB
Plaintext
test compile precise-output
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target x86_64
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function %f1(i8x16) -> i8 {
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block0(v0: i8x16):
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v1 = extractlane v0, 1
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return v1
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; pextrb $1, %xmm0, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; pextrb $1, %xmm0, %eax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f2(i16x8) -> i16 {
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block0(v0: i16x8):
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v1 = extractlane v0, 1
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return v1
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; pextrw $1, %xmm0, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; pextrw $1, %xmm0, %eax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f3(i32x4) -> i32 {
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block0(v0: i32x4):
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v1 = extractlane v0, 1
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return v1
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; pextrd $1, %xmm0, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; pextrd $1, %xmm0, %eax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f4(i64x2) -> i64 {
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block0(v0: i64x2):
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v1 = extractlane v0, 1
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return v1
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; pextrq $1, %xmm0, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; pextrq $1, %xmm0, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f5(f32x4) -> f32 {
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block0(v0: f32x4):
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v1 = extractlane v0, 1
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return v1
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; pshufd $1, %xmm0, %xmm0
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; pshufd $1, %xmm0, %xmm0
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f6(f64x2) -> f64 {
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block0(v0: f64x2):
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v1 = extractlane v0, 1
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return v1
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; pshufd $238, %xmm0, %xmm0
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; pshufd $0xee, %xmm0, %xmm0
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %extract_i32x4_lane0_to_memory(i32x4, i64) {
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block0(v0: i32x4, v1: i64):
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v2 = extractlane v0, 0
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store v2, v1
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return
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movss %xmm0, 0(%rdi)
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movss %xmm0, (%rdi) ; trap: heap_oob
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %extract_f32x4_lane0_to_memory(f32x4, i64) {
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block0(v0: f32x4, v1: i64):
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v2 = extractlane v0, 0
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store v2, v1
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return
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movss %xmm0, 0(%rdi)
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movss %xmm0, (%rdi) ; trap: heap_oob
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %extract_i64x2_lane0_to_memory(i64x2, i64) {
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block0(v0: i64x2, v1: i64):
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v2 = extractlane v0, 0
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store v2, v1
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return
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movsd %xmm0, 0(%rdi)
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movsd %xmm0, (%rdi) ; trap: heap_oob
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %extract_f64x2_lane0_to_memory(f64x2, i64) {
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block0(v0: f64x2, v1: i64):
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v2 = extractlane v0, 0
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store v2, v1
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return
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movsd %xmm0, 0(%rdi)
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movsd %xmm0, (%rdi) ; trap: heap_oob
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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