Jakob Stoklund Olesen 09734f2033 Add controls for enabling M, F, and D RISC-V extensions. ...

Three predicates affect each extension:

- supports_m determines whether the target CPU supports the instruction set.
- enable_m determines if the instructions should be used, assuming they're
  available.
- use_m is the predicate used to actually use the instructions.

2016-08-30 15:44:26 -07:00

..

riscv

Add controls for enabling M, F, and D RISC-V extensions.

2016-08-30 15:44:26 -07:00

__init__.py

Python 3 compat.

2016-08-23 16:35:58 -07:00