This PR switches Cranelift over to the new register allocator, regalloc2. See [this document](https://gist.github.com/cfallin/08553421a91f150254fe878f67301801) for a summary of the design changes. This switchover has implications for core VCode/MachInst types and the lowering pass. Overall, this change brings improvements to both compile time and speed of generated code (runtime), as reported in #3942: ``` Benchmark Compilation (wallclock) Execution (wallclock) blake3-scalar 25% faster 28% faster blake3-simd no diff no diff meshoptimizer 19% faster 17% faster pulldown-cmark 17% faster no diff bz2 15% faster no diff SpiderMonkey, 21% faster 2% faster fib(30) clang.wasm 42% faster N/A ```
70 lines
1.8 KiB
Rust
70 lines
1.8 KiB
Rust
use crate::ir::{SourceLoc, ValueLabel};
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use crate::machinst::Reg;
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use crate::HashMap;
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use alloc::vec::Vec;
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use core::cmp::Ordering;
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use core::convert::From;
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use core::ops::Deref;
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#[cfg(feature = "enable-serde")]
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use serde::{Deserialize, Serialize};
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/// Value location range.
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
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pub struct ValueLocRange {
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/// The ValueLoc containing a ValueLabel during this range.
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pub loc: LabelValueLoc,
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/// The start of the range. It is an offset in the generated code.
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pub start: u32,
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/// The end of the range. It is an offset in the generated code.
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pub end: u32,
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}
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/// The particular location for a value.
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
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pub enum LabelValueLoc {
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/// New-backend Reg.
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Reg(Reg),
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/// New-backend offset from stack pointer.
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SPOffset(i64),
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}
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/// Resulting map of Value labels and their ranges/locations.
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pub type ValueLabelsRanges = HashMap<ValueLabel, Vec<ValueLocRange>>;
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#[derive(Eq, Clone, Copy)]
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pub struct ComparableSourceLoc(SourceLoc);
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impl From<SourceLoc> for ComparableSourceLoc {
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fn from(s: SourceLoc) -> Self {
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Self(s)
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}
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}
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impl Deref for ComparableSourceLoc {
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type Target = SourceLoc;
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fn deref(&self) -> &SourceLoc {
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&self.0
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}
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}
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impl PartialOrd for ComparableSourceLoc {
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fn partial_cmp(&self, other: &Self) -> Option<Ordering> {
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Some(self.cmp(other))
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}
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}
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impl Ord for ComparableSourceLoc {
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fn cmp(&self, other: &Self) -> Ordering {
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self.0.bits().cmp(&other.0.bits())
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}
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}
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impl PartialEq for ComparableSourceLoc {
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fn eq(&self, other: &Self) -> bool {
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self.0 == other.0
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}
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}
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