34 lines
698 B
Plaintext
34 lines
698 B
Plaintext
test alias-analysis
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set opt_level=speed
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target aarch64
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;; A test of partial redundancy: we should *not* RLE when an earlier
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;; load to the location is only in one predecessor of multiple.
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function %f0(i64 vmctx, i32) -> i32, i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap readonly aligned gv0+8
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fn0 = %g(i64 vmctx)
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block0(v0: i64, v1: i32):
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brif v1, block2, block1
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block1:
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v2 = global_value.i64 gv1
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v3 = load.i32 v2+64
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jump block3(v3)
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block2:
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v4 = global_value.i64 gv1
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v5 = load.i32 v4+128
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jump block3(v5)
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block3(v6: i32):
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v7 = global_value.i64 gv1
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v8 = load.i32 v7+64
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;; load should survive:
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; check: v8 = load.i32 v7+64
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return v6, v8
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}
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