0508932174
* cranelift: Reorganize test suite Group some SIMD operations by instruction. * cranelift: Deduplicate some shift tests Also, new tests with the mod behaviour * aarch64: Lower shifts with mod behaviour * x64: Lower shifts with mod behaviour * wasmtime: Don't mask SIMD shifts
46 lines
1.9 KiB
Plaintext
46 lines
1.9 KiB
Plaintext
test run
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set enable_simd
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target aarch64
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target s390x
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target x86_64 has_sse3 has_ssse3 has_sse41
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function %bitselect_i32x4(i32x4, i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4, v2: i32x4):
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v3 = bitselect v0, v1, v2
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return v3
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}
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; run: %bitselect_i32x4(0x00000000000000000000000000000000, 0x11111111111111111111111111111111, 0x00000000000000000000000000000000) == 0x00000000000000000000000000000000
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; run: %bitselect_i32x4(0x11111111111111111111111111111111, 0x11111111111111111111111111111111, 0x00000000000000000000000000000000) == 0x11111111111111111111111111111111
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; run: %bitselect_i32x4(0x01010011000011110000000011111111, 0x11111111111111111111111111111111, 0x00000000000000000000000000000000) == 0x01010011000011110000000011111111
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; run: %bitselect_i32x4(0x00000000000000001111111111111111, 0x00000000000000000000000000000000, 0x11111111111111111111111111111111) == 0x11111111111111110000000000000000
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function %bitselect_i8x16(i8x16, i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16, v2: i8x16):
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v3 = bitselect v0, v1, v2
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return v3
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}
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; Remember that bitselect accepts: 1) the selector vector, 2) the "if true" vector, and 3) the "if false" vector.
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; run: %bitselect_i8x16([0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255], [127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42], [42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127]) == [42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42]
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function %bitselect_i8x16() -> b1 {
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block0:
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v0 = vconst.i8x16 [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255] ; the selector vector
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v1 = vconst.i8x16 [127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42] ; for each 1-bit in v0 the bit of v1 is selected
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v2 = vconst.i8x16 [42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127] ; for each 0-bit in v0 the bit of v2 is selected
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v3 = bitselect v0, v1, v2
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v4 = extractlane v3, 0
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v5 = icmp_imm eq v4, 42
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v6 = extractlane v3, 1
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v7 = icmp_imm eq v6, 0
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v8 = extractlane v3, 15
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v9 = icmp_imm eq v8, 42
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v10 = band v5, v7
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v11 = band v10, v9
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return v11
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}
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; run
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