test regalloc
set is_64bit
isa intel haswell

; Reported as https://github.com/Cretonne/cretonne/issues/216 from the Binaryen fuzzer.
;
; The (old) coalescer creates a virtual register with two identical values.
function %pr216(i32 [%rdi], i64 vmctx [%rsi]) -> i64 [%rax] native {
ebb0(v0: i32, v1: i64):
    v3 = iconst.i64 0
    v5 = iconst.i32 0
    brz v5, ebb3(v3)
    jump ebb4(v3, v3)

ebb4(v11: i64, v29: i64):
    v6 = iconst.i32 0
    brz v6, ebb14
    v9 = iconst.i32 -17
    v12 = iconst.i32 0xffff_ffff_ffff_8000
    jump ebb9(v12)

ebb9(v10: i32):
    brnz v10, ebb8(v9, v11, v11)
    brz.i32 v9, ebb13
    v13 = iconst.i32 0
    brnz v13, ebb6(v11, v11)
    v14 = iconst.i32 0
    brz v14, ebb12
    jump ebb11

ebb12:
    jump ebb4(v11, v11)

ebb11:
    jump ebb10(v11)

ebb13:
    v15 = iconst.i64 1
    jump ebb10(v15)

ebb10(v21: i64):
    v16 = iconst.i32 0
    brnz v16, ebb6(v21, v11)
    v17 = iconst.i32 0xffff_ffff_ffff_9f35
    jump ebb8(v17, v21, v11)

ebb8(v8: i32, v23: i64, v28: i64):
    jump ebb7(v8, v23, v28)

ebb14:
    v18 = iconst.i32 0
    jump ebb7(v18, v11, v29)

ebb7(v7: i32, v22: i64, v27: i64):
    jump ebb6(v22, v27)

ebb6(v20: i64, v25: i64):
    v19 = iconst.i32 0xffc7
    brnz v19, ebb4(v20, v25)
    jump ebb5

ebb5:
    jump ebb3(v25)

ebb3(v24: i64):
    jump ebb2(v24)

ebb2(v4: i64):
    jump ebb1(v4)

ebb1(v2: i64):
    return v2
}