; Test the legalization of i64 arithmetic instructions.
test legalizer
isa riscv supports_m=1

; regex: V=v\d+

function bitwise_and(i64, i64) -> i64 {
ebb0(v1: i64, v2: i64):
    v3 = band v1, v2
    return v3
}
; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32, $(link=$V): i32):
; check: [R#ec
; sameln: $(v3l=$V) = band $v1l, $v2l
; check: [R#ec
; sameln: $(v3h=$V) = band $v1h, $v2h
; check: $v3 = iconcat $v3l, $v3h
; check: return $v3l, $v3h, $link

function bitwise_or(i64, i64) -> i64 {
ebb0(v1: i64, v2: i64):
    v3 = bor v1, v2
    return v3
}
; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32, $(link=$V): i32):
; check: [R#cc
; sameln: $(v3l=$V) = bor $v1l, $v2l
; check: [R#cc
; sameln: $(v3h=$V) = bor $v1h, $v2h
; check: $v3 = iconcat $v3l, $v3h
; check: return $v3l, $v3h, $link

function bitwise_xor(i64, i64) -> i64 {
ebb0(v1: i64, v2: i64):
    v3 = bxor v1, v2
    return v3
}
; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32, $(link=$V): i32):
; check: [R#8c
; sameln: $(v3l=$V) = bxor $v1l, $v2l
; check: [R#8c
; sameln: $(v3h=$V) = bxor $v1h, $v2h
; check: $v3 = iconcat $v3l, $v3h
; check: return $v3l, $v3h, $link

function arith_add(i64, i64) -> i64 {
; Legalizing iadd.i64 requires two steps:
; 1. Narrow to iadd_cout.i32, then
; 2. Expand iadd_cout.i32 since RISC-V has no carry flag.
ebb0(v1: i64, v2: i64):
    v3 = iadd v1, v2
    return v3
}
; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32, $(link=$V): i32):
; check: [R#0c
; sameln: $(v3l=$V) = iadd $v1l, $v2l
; check: $(c=$V) = icmp ult $v3l, $v1l
; check: [R#0c
; sameln: $(v3h1=$V) = iadd $v1h, $v2h
; check: $(c_int=$V) = bint.i32 $c
; check: [R#0c
; sameln: $(v3h=$V) = iadd $v3h1, $c_int
; check: $v3 = iconcat $v3l, $v3h
; check: return $v3l, $v3h, $link