test vcode
target aarch64

function %f(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
  v2 = icmp eq v0, v1
  return v2
}

; check: stp fp, lr, [sp, #-16]!
; nextln: mov fp, sp
; nextln: subs xzr, x0, x1
; nextln: cset x0, eq
; nextln: mov sp, fp
; nextln: ldp fp, lr, [sp], #16
; nextln: ret

function %f(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
  v2 = ifcmp v0, v1
  brif eq v2, block1
  jump block2

block1:
  v4 = iconst.i64 1
  return v4

block2:
  v5 = iconst.i64 2
  return v5
}

; check: Block 0:
; check: stp fp, lr, [sp, #-16]!
; nextln: mov fp, sp
; nextln: subs xzr, x0, x1
; nextln: b.eq label1 ; b label2
; check: Block 1:
; check: movz x0, #1
; nextln: mov sp, fp
; nextln: ldp fp, lr, [sp], #16
; nextln: ret
; check: Block 2:
; check: movz x0, #2
; nextln: mov sp, fp
; nextln: ldp fp, lr, [sp], #16
; nextln: ret

function %f(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
  v2 = ifcmp v0, v1
  brif eq v2, block1
  jump block1

block1:
  v4 = iconst.i64 1
  return v4
}

; check: stp fp, lr, [sp, #-16]!
; nextln: mov fp, sp
; nextln: subs xzr, x0, x1
; check: Block 1:
; check: movz x0, #1
; nextln: mov sp, fp
; nextln: ldp fp, lr, [sp], #16
; nextln: ret