test licm
target riscv32

function %multiple_blocks(i32) -> i32 {

block0(v0: i32):
    jump block1(v0)

block1(v10: i32):
    v11 = iconst.i32 1
    v12 = iconst.i32 2
    v13 = iadd v11, v12
    brz v10, block4(v10)
    jump block2

block2:
    v15 = isub v10, v11
    brz v15, block5(v15)
    jump block3

block3:
    v14 = isub v10, v11
    jump block1(v14)

block4(v20: i32):
    return v20

block5(v30: i32):
    v31 = iadd v11, v13
    jump block1(v30)

}
; sameln:function %multiple_blocks(i32) -> i32 {
; nextln: block0(v0: i32):
; nextln:     v11 = iconst.i32 1
; nextln:     v12 = iconst.i32 2
; nextln:     v13 = iadd v11, v12
; nextln:     v31 = iadd v11, v13
; nextln:     jump block1(v0)
; nextln: 
; nextln: block1(v10: i32):
; nextln:     brz v10, block4(v10)
; nextln:     jump block2
; nextln: 
; nextln: block2:
; nextln:     v15 = isub.i32 v10, v11
; nextln:     brz v15, block5(v15)
; nextln:     jump block3
; nextln: 
; nextln: block3:
; nextln:     v14 = isub.i32 v10, v11
; nextln:     jump block1(v14)
; nextln: 
; nextln: block4(v20: i32):
; nextln:     return v20
; nextln: 
; nextln: block5(v30: i32):
; nextln:     jump block1(v30)
; nextln: }