test cat

; The smallest possible function.
function %minimal() {
ebb0:
    trap
}
; sameln: function %minimal() {
; nextln: ebb0:
; nextln:     trap
; nextln: }

; Create and use values.
; Polymorphic instructions with type suffix.
function %ivalues() {
ebb0:
    v0 = iconst.i32 2
    v1 = iconst.i8 6
    v2 = ishl v0, v1
}
; sameln: function %ivalues() {
; nextln: ebb0:
; nextln:     $v0 = iconst.i32 2
; nextln:     $v1 = iconst.i8 6
; nextln:     $v2 = ishl $v0, $v1
; nextln: }

; Create and use values.
; Polymorphic instructions with type suffix.
function %bvalues() {
ebb0:
    v0 = bconst.b32 true
    v1 = bconst.b8 false
    v2 = bextend.b32 v1
    v3 = bxor v0, v2
}
; sameln: function %bvalues() {
; nextln: ebb0:
; nextln:     $v0 = bconst.b32 true
; nextln:     $v1 = bconst.b8 false
; nextln:     $v2 = bextend.b32 v1
; nextln:     $v3 = bxor v0, v2
; nextln: }

; Polymorphic istruction controlled by second operand.
function %select() {
ebb0(v90: i32, v91: i32, v92: b1):
    v0 = select v92, v90, v91
}
; sameln: function %select() {
; nextln: ebb0($v90: i32, $v91: i32, $v92: b1):
; nextln:     $v0 = select $v92, $v90, $v91
; nextln: }

; Lane indexes.
function %lanes() {
ebb0:
    v0 = iconst.i32x4 2
    v1 = extractlane v0, 3
    v2 = insertlane v0, 1, v1
}
; sameln: function %lanes() {
; nextln: ebb0:
; nextln:     $v0 = iconst.i32x4 2
; nextln:     $v1 = extractlane $v0, 3
; nextln:     $v2 = insertlane $v0, 1, $v1
; nextln: }

; Integer condition codes.
function %icmp(i32, i32) {
ebb0(v90: i32, v91: i32):
    v0 = icmp eq v90, v91
    v1 = icmp ult v90, v91
    v2 = icmp_imm sge v90, -12
    v3 = irsub_imm v91, 45
    br_icmp eq v90, v91, ebb0(v91, v90)
}
; sameln: function %icmp(i32, i32) {
; nextln: ebb0($v90: i32, $v91: i32):
; nextln:     $v0 = icmp eq $v90, $v91
; nextln:     $v1 = icmp ult $v90, $v91
; nextln:     $v2 = icmp_imm sge $v90, -12
; nextln:     $v3 = irsub_imm $v91, 45
; nextln:     br_icmp eq $v90, $v91, ebb0($v91, $v90)
; nextln: }

; Floating condition codes.
function %fcmp(f32, f32) {
ebb0(v90: f32, v91: f32):
    v0 = fcmp eq v90, v91
    v1 = fcmp uno v90, v91
    v2 = fcmp lt v90, v91
}
; sameln: function %fcmp(f32, f32) {
; nextln: ebb0($v90: f32, $v91: f32):
; nextln:     $v0 = fcmp eq $v90, $v91
; nextln:     $v1 = fcmp uno $v90, $v91
; nextln:     $v2 = fcmp lt $v90, $v91
; nextln: }

; The bitcast instruction has two type variables: The controlling type variable
; controls the outout type, and the input type is a free variable.
function %bitcast(i32, f32) {
ebb0(v90: i32, v91: f32):
    v0 = bitcast.i8x4 v90
    v1 = bitcast.i32 v91
}
; sameln: function %bitcast(i32, f32) {
; nextln: ebb0($v90: i32, $v91: f32):
; nextln:     $v0 = bitcast.i8x4 $v90
; nextln:     $v1 = bitcast.i32 $v91
; nextln: }

; Stack slot references
function %stack() {
    ss10 = spill_slot 8
    ss2 = local 4
    ss3 = incoming_arg 4, offset 8
    ss4 = outgoing_arg 4

ebb0:
    v1 = stack_load.i32 ss10
    v2 = stack_load.i32 ss10+4
    stack_store v1, ss10+2
    stack_store v2, ss2
}
; sameln: function %stack() {
; nextln:    $ss10 = spill_slot 8
; nextln:    $ss2 = local 4
; nextln:    $ss3 = incoming_arg 4, offset 8
; nextln:    $ss4 = outgoing_arg 4

; check: ebb0:
; nextln: $v1 = stack_load.i32 $ss10
; nextln: $v2 = stack_load.i32 $ss10+4
; nextln: stack_store $v1, $ss10+2
; nextln: stack_store $v2, $ss2

; Heap access instructions.
function %heap(i32) {
    ; TODO: heap0 = heap %foo
ebb0(v1: i32):
    v2 = heap_load.f32 v1
    v3 = heap_load.f32 v1+12
    heap_store v3, v1
}
; sameln: function %heap(i32) {
; nextln: ebb0($v1: i32):
; nextln:     $v2 = heap_load.f32 $v1
; nextln:     $v3 = heap_load.f32 $v1+12
; nextln:     heap_store $v3, $v1

; Memory access instructions.
function %memory(i32) {
ebb0(v1: i32):
    v2 = load.i64 v1
    v3 = load.i64 aligned v1
    v4 = load.i64 notrap v1
    v5 = load.i64 notrap aligned v1
    v6 = load.i64 aligned notrap v1
    v7 = load.i64 v1-12
    v8 = load.i64 notrap v1+0x1_0000
    store v2, v1
    store aligned v3, v1+12
    store notrap aligned v3, v1-12
}
; sameln: function %memory(i32) {
; nextln: ebb0($v1: i32):
; nextln:     $v2 = load.i64 $v1
; nextln:     $v3 = load.i64 aligned $v1
; nextln:     $v4 = load.i64 notrap $v1
; nextln:     $v5 = load.i64 notrap aligned $v1
; nextln:     $v6 = load.i64 notrap aligned $v1
; nextln:     $v7 = load.i64 $v1-12
; nextln:     $v8 = load.i64 notrap $v1+0x0001_0000
; nextln:     store $v2, $v1
; nextln:     store aligned $v3, $v1+12
; nextln:     store notrap aligned $v3, $v1-12

; Register diversions.
; This test file has no ISA, so we can unly use register unit numbers.
function %diversion(i32) {
ebb0(v1: i32):
    regmove v1, %10 -> %20
    regmove v1, %20 -> %10
    return
}
; sameln: function %diversion(i32) {
; nextln: ebb0($v1: i32):
; nextln:     regmove $v1, %10 -> %20
; nextln:     regmove $v1, %20 -> %10
; nextln:     return
; nextln: }