test licm
target riscv32

function %nested_loops(i32) -> i32 {

block0(v0: i32):
    jump block1(v0)

block1(v1: i32):
    v2 = iconst.i32 1
    v3 = iconst.i32 2
    v4 = iadd v2, v3
    v5 = isub v1, v2
    jump block2(v5, v5)

block2(v10: i32, v11: i32):
    brif v11, block3, block4(v10)

block3:
    v12 = iconst.i32 1
    v15 = iadd v12, v5
    v13 = isub v11, v12
    jump block2(v10,v13)

block4(v20: i32):
    brif v20, block1(v20), block5(v20)

block5(v30: i32):
    return v30

}

; sameln:function %nested_loops(i32) -> i32 {
; nextln: block0(v0: i32):
; nextln:     v2 = iconst.i32 1
; nextln:     v3 = iconst.i32 2
; nextln:     v4 = iadd v2, v3
; nextln:     v12 = iconst.i32 1
; nextln:     jump block1(v0)
; nextln: 
; nextln: block1(v1: i32):
; nextln:     v5 = isub v1, v2
; nextln:     v15 = iadd.i32 v12, v5
; nextln:     jump block2(v5, v5)
; nextln: 
; nextln: block2(v10: i32, v11: i32):
; nextln:     brif v11, block3, block4(v10)
; nextln: 
; nextln: block3:
; nextln:     v13 = isub.i32 v11, v12
; nextln:     jump block2(v10, v13)
; nextln: 
; nextln: block4(v20: i32):
; nextln:     brif v20, block1(v20), block5(v20)
; nextln: 
; nextln: block5(v30: i32):
; nextln:     return v30
; nextln: }