test interpret
test run
target x86_64
target aarch64
target s390x
target riscv64

function %fsub_f32(f32, f32) -> f32 {
block0(v0: f32, v1: f32):
    v2 = fsub v0, v1
    return v2
}
; run: %fsub_f32(0x0.5, 0x1.0) == -0x1.6p-1
; run: %fsub_f32(0x1.5, 0x2.9) == -0x1.4p0
; run: %fsub_f32(0x1.1p10, 0x1.4p1) == 0x1.0f6p10
; run: %fsub_f32(0x1.4cccccp0, 0x1.8p0) == -0x1.9999a0p-3
; run: %fsub_f32(0x1.b33334p0, 0x1.99999ap-2) == 0x1.4ccccep0
; run: %fsub_f32(0x1.333334p-1, 0x1.666666p1) == -0x1.199998p1
; run: %fsub_f32(-0x0.5, -0x1.0) == 0x1.6p-1
; run: %fsub_f32(-0x1.5, -0x2.9) == 0x1.4p0
; run: %fsub_f32(-0x1.1p10, -0x1.333334p-1) == -0x1.0fd99ap10
; run: %fsub_f32(-0x1.99999ap-2, -0x1.4cccccp0) == 0x1.ccccccp-1
; run: %fsub_f32(-0x1.8p0, -0x1.b33334p0) == 0x1.9999a0p-3
; run: %fsub_f32(-0x1.4p1, -0x1.666666p1) == 0x1.333330p-2
; run: %fsub_f32(0x0.5, -0x1.0) == 0x1.5p0
; run: %fsub_f32(0x1.b33334p0, -0x1.b33334p0) == 0x1.b33334p1

; Specials
; run: %fsub_f32(0x0.0, -0x0.0) == 0x0.0
; run: %fsub_f32(-0x0.0, 0x0.0) == -0x0.0
; run: %fsub_f32(-0x0.0, +Inf) == -Inf
; run: %fsub_f32(0x0.0, -Inf) == +Inf
; run: %fsub_f32(+Inf, -Inf) == +Inf
; run: %fsub_f32(-Inf, +Inf) == -Inf

; F32 Epsilon / Max / Min Positive
; run: %fsub_f32(0x1.0p-23, 0x1.fffffep127) == -0x1.fffffep127
; run: %fsub_f32(0x1.0p-23, 0x1.0p-126) == 0x1.0p-23
; run: %fsub_f32(0x1.fffffep127, 0x1.fffffep127) == 0x0.0
; run: %fsub_f32(0x1.0p-126, 0x1.fffffep127) == -0x1.fffffep127
; run: %fsub_f32(0x1.0p-126, 0x1.0p-126) == 0x0.0

; F32 Subnormals
; run: %fsub_f32(0x0.8p-126, -0x0.800002p-126) == 0x1.000002p-126
; run: %fsub_f32(0x0.8p-126, 0x1.0) == -0x1.0
; run: %fsub_f32(-0x0.800002p-126, 0x1.0) == -0x1.0

; F32 NaN's
; For NaN's this operation is specified as producing a value that is a NaN
function %fsub_is_nan_f32(f32, f32) -> i32 {
block0(v0: f32, v1: f32):
    v2 = fsub v0, v1
    v3 = fcmp ne v2, v2
    v4 = uextend.i32 v3
    return v4
}
; run: %fsub_is_nan_f32(0x0.0, +NaN) == 1
; run: %fsub_is_nan_f32(0x0.0, -NaN) == 1
; run: %fsub_is_nan_f32(0x0.0, +NaN:0x0) == 1
; run: %fsub_is_nan_f32(0x0.0, +NaN:0x1) == 1
; run: %fsub_is_nan_f32(0x0.0, +NaN:0x300001) == 1
; run: %fsub_is_nan_f32(0x0.0, -NaN:0x0) == 1
; run: %fsub_is_nan_f32(0x0.0, -NaN:0x1) == 1
; run: %fsub_is_nan_f32(0x0.0, -NaN:0x300001) == 1
; run: %fsub_is_nan_f32(0x0.0, +sNaN:0x1) == 1
; run: %fsub_is_nan_f32(0x0.0, -sNaN:0x1) == 1
; run: %fsub_is_nan_f32(0x0.0, +sNaN:0x200001) == 1
; run: %fsub_is_nan_f32(0x0.0, -sNaN:0x200001) == 1



function %fsub_f64(f64, f64) -> f64 {
block0(v0: f64, v1: f64):
    v2 = fsub v0, v1
    return v2
}
; run: %fsub_f64(0x0.5, 0x1.0) == -0x1.6p-1
; run: %fsub_f64(0x1.5, 0x2.9) == -0x1.4
; run: %fsub_f64(0x1.1p10, 0x1.4p1) == 0x1.0f6p10
; run: %fsub_f64(0x1.4cccccccccccdp0, 0x1.8p0) == -0x1.9999999999998p-3
; run: %fsub_f64(0x1.b333333333333p0, 0x1.999999999999ap-2) == 0x1.4ccccccccccccp0
; run: %fsub_f64(0x1.3333333333333p-1, 0x1.6666666666666p1) == -0x1.1999999999999p1
; run: %fsub_f64(-0x0.5, -0x1.0) == 0x1.6p-1
; run: %fsub_f64(-0x1.5, -0x2.9) == 0x1.4
; run: %fsub_f64(-0x1.1p10, -0x1.3333333333333p-1) == -0x1.0fd999999999ap10
; run: %fsub_f64(-0x1.999999999999ap-2, -0x1.4cccccccccccdp0) == 0x1.ccccccccccccdp-1
; run: %fsub_f64(-0x1.8p0, -0x1.b333333333333p0) == 0x1.9999999999998p-3
; run: %fsub_f64(-0x1.4p1, -0x1.6666666666666p1) == 0x1.3333333333330p-2
; run: %fsub_f64(0x0.5, -0x1.0) == 0x1.5
; run: %fsub_f64(0x1.b333333333333p0, -0x1.b333333333333p0) == 0x1.b333333333333p1

; Specials
; run: %fsub_f64(0x0.0, -0x0.0) == 0x0.0
; run: %fsub_f64(-0x0.0, 0x0.0) == -0x0.0
; run: %fsub_f64(-0x0.0, +Inf) == -Inf
; run: %fsub_f64(0x0.0, -Inf) == +Inf
; run: %fsub_f64(+Inf, -Inf) == +Inf
; run: %fsub_f64(-Inf, +Inf) == -Inf

; F64 Epsilon / Max / Min Positive
; run: %fsub_f64(0x1.0p-52, 0x1.fffffffffffffp1023) == -0x1.fffffffffffffp1023
; run: %fsub_f64(0x1.0p-52, 0x1.0p-1022) == 0x1.0p-52
; run: %fsub_f64(0x1.fffffffffffffp1023, 0x1.fffffffffffffp1023) == 0x0.0
; run: %fsub_f64(0x1.0p-1022, 0x1.fffffffffffffp1023) == -0x1.fffffffffffffp1023
; run: %fsub_f64(0x1.0p-1022, 0x1.0p-1022) == 0x0.0

; F64 Subnormals
; run: %fsub_f64(0x0.8p-1022, -0x0.8p-1022) == 0x1.0000000000000p-1022
; run: %fsub_f64(0x0.8p-1022, 0x1.0) == -0x1.0
; run: %fsub_f64(-0x0.8p-1022, 0x1.0) == -0x1.0


; F64 NaN's
; For NaN's this operation is specified as producing a value that is a NaN
function %fsub_is_nan_f64(f64, f64) -> i32 {
block0(v0: f64, v1: f64):
    v2 = fsub v0, v1
    v3 = fcmp ne v2, v2
    v4 = uextend.i32 v3
    return v4
}
; run: %fsub_is_nan_f64(0x0.0, +NaN) == 1
; run: %fsub_is_nan_f64(0x0.0, -NaN) == 1
; run: %fsub_is_nan_f64(0x0.0, +NaN:0x0) == 1
; run: %fsub_is_nan_f64(0x0.0, +NaN:0x1) == 1
; run: %fsub_is_nan_f64(0x0.0, +NaN:0x4000000000001) == 1
; run: %fsub_is_nan_f64(0x0.0, -NaN:0x0) == 1
; run: %fsub_is_nan_f64(0x0.0, -NaN:0x1) == 1
; run: %fsub_is_nan_f64(0x0.0, -NaN:0x4000000000001) == 1
; run: %fsub_is_nan_f64(0x0.0, +sNaN:0x1) == 1
; run: %fsub_is_nan_f64(0x0.0, -sNaN:0x1) == 1
; run: %fsub_is_nan_f64(0x0.0, +sNaN:0x4000000000001) == 1
; run: %fsub_is_nan_f64(0x0.0, -sNaN:0x4000000000001) == 1