Commit Graph

492 Commits

Author SHA1 Message Date
Dan Gohman
1098eafb45 Remove the concept of non-dense jump tables.
WebAssembly doesn't have non-dense jump tables, and higher-level users
are better served by the facilities in lib/frontend/src/switch.rs for
working with non-dense switches.

This eliminates the concept of "absent" jump table entries, which
were represented as "0" in the text format.

Also, jump table contents are now enclosed in `[` and `]`, so that
we can unambiguously display empty jump tables. Previously, empty jump
tables were displayed as if they had a single absent entry.
2018-10-04 12:46:40 -07:00
bjorn3
b2a28d69e6 Add encodings for i8 and i16 copy, spill, fill, ireduce.i8.i16 (#534)
* Add encodings for i8 and i16 copy, spill, fill, ireduce.i8.i16

Also adds legalization for srem, irsub_imm, {u,s}extend.i16.i8

Fixes #477 cc #466

* Legalize popcnt, clz and ctz for i8 and i16

* Fix bug in call_memset
2018-10-03 14:43:59 -07:00
Tyler McMullen
79cea5e18b Implement jump tables (#453)
* Add 'jump_table_entry' and 'indirect_jump' instructions.

* Update CodeSink to keep track of code size. Pretty up clif-util's disassembly output.

* Only disassemble the machine portion of output. Pretty print the read-only data after it.

* Update switch frontend code to use new br_table instruction w/ default.
2018-10-03 10:04:21 -07:00
bjorn3
2eec1469a8 Legalize some more i8/i16 intructions (#524)
* Legalize some more i8/i16 intructions
2018-09-25 16:10:23 -07:00
Maddy
52e6b07058 Update the reload pass to replace copies with fill/spill instructions. 2018-09-12 14:15:45 -07:00
Dan Gohman
ca9da7702e Reorganize the global value kinds. (#490)
* Reorganize the global value kinds.

This:
 - renames "deref" global values to "load" and gives it a offset that works
   like the "load" instructions' does
 - adds an explicit "iadd_imm" global value kind, which replaces the
   builtin iadd in "vmctx" and "deref" global values.
 - also renames "globalsym" to "symbol"
2018-09-04 21:09:04 -07:00
Aaron Power
17bb62c16c Added bitrev instruction for 32 and 64 bit integers (#486) 2018-09-04 16:23:50 -07:00
Dan Gohman
8e2d01a675 Add an index_type field to Table.
This parallels the `index_type` field in `Heap`.
2018-08-28 14:28:43 -07:00
Dan Gohman
0d24641f21 Fix a verifier test failure.
This test was accidentally relying on the bug that #485 fixed.
2018-08-28 13:50:28 -07:00
Dan Gohman
eb439c9a68 Fix legalization of heap_addrs with 32-bit indices. (#480)
This makes several changes:
 - It adds an index_type to heap declarations, allowing heaps to specify the
   type for indexing. This also anticipates 64-bit heap support.

 - It adds a memory_type to deref global values, allowing deref globals to
   have types other than pointers. This is used to allow the bound variable
   in dynamic heaps to have type i32, to match the index type in heaps
   with i32 index type.

 - And, it fixes heap legalization to do the bounds check in the heap's
   index type.
2018-08-28 13:37:33 -07:00
Grégoire Geis
0e67255f52 Fix error not reported if at least one other error expected. (#485)
* fix error not reported if at least one other error expected.

* Fixed unused extern crate error if wasm feature is not enabled.

* No longer reporting deref cycles multiple times.

* Fix filetest type_check.clif.

* Switched comparison order for perf.

* Fixed isa/riscv/verify-encoding.clif filetest.
2018-08-28 10:33:46 -07:00
Dan Gohman
eab8f784fa Rename nop.cton to nop.clif. 2018-08-27 16:28:24 -07:00
bjorn3
3f582f7cbd Legalize br_icmp (#449)
* Legalize br_icmp
2018-08-13 18:31:39 -07:00
bjorn3
fa65ee7a68 Legalize bint.i8 2018-08-13 21:23:25 +02:00
Benjamin Bouvier
f7e481d9ac Implement wasm saturating conversions; 2018-08-09 19:50:41 -07:00
Sergey Pepyakin
9dbfbbde10 Stack Limit as an Argument Purpose (#372)
* Initial approach.

* Move stack_limit check before opening the frame

* Account for GPRs and frame pointer in stack check

* Check stack_limit example.

* Remove stack_limit attribute code.

Amends #359

* fmt
2018-08-04 06:16:21 -07:00
Dan Gohman
1b30265c5c Define a "table" concept.
"Table" is to WebAssembly tables as "Heap" is to WebAssembly linear
memories.
2018-08-02 15:21:34 -07:00
bjorn3
01729be8d7 Add comment support (#379)
* Add comment support

* Don't print empty comments

* Add nop instruction

* Add test and note

* Add FuncWriter trait

* Remove comment support

* Add write_preamble to FuncWriter

* Fix test

* Some changes
2018-08-01 11:21:05 -07:00
Benjamin Bouvier
3a550d185f Enhance Verifier error reporting; 2018-07-31 08:02:14 -07:00
Dan Gohman
1b42105faa Remove reserved_reg functionality. (#424)
* Remove reserved_reg functionality.

This wasn't implemented, and if we need it in the future, it seems like
it would be better to extend the concept of global values to cover this.

* Use GlobalValue::reserved_value() for sentinal values.
2018-07-31 07:57:37 -07:00
Dan Gohman
401c872c52 Update more paths for the CraneStation/cranelift rename. 2018-07-13 09:22:15 -07:00
Dan Gohman
f4dbd38a4c Rename Cretonne to Cranelift! 2018-07-13 09:15:16 -07:00
bjorn3
5db45d26cc Legalize several i8 insts (#380)
* Legalize several i8 insts

* X86: implement regmove.{i8,i16}

* Legalize bnot

* Remove comments

* Nicer type param binding in legalize.py

* Legalize sdiv_imm.i8

* Hopefully fix mypy error

* Add missing trailing newlines

* Fix tests
2018-07-04 06:31:00 -07:00
Grégoire Geis
dd72b54eef Now diagnosing missing vmctx arguments (fixes #376) (#384)
* Now diagnosing missing vmctx arguments (fixes #376).

* Added filetest for fix of #376.

* Respect formatting rules in verifier/mod.rs.

* Added parameters for each use of vmctx in test files.

* Added comments on additions on vmctx verifications.
2018-07-03 20:59:32 -07:00
Dan Gohman
4930ef8ba8 Remove srclocs from a regalloc testcase.
These aren't relevant to the testcase.
2018-07-02 22:44:30 -07:00
Dan Gohman
99b9b96eee Pop and fill don't trigger StackOverflow. (#365) 2018-06-28 12:47:13 -07:00
Dan Gohman
c5aad1eb5f Add support for macho relocations. (#378)
This requires splitting X86PCRel4 into two separate relocations, to
distinguish the case where the instruction is a call, as Mach-O uses a
different relocation in that case.

This also makes it explicit that only x86-64 relocations are supported
currently.
2018-06-28 10:15:10 -07:00
Dan Gohman
7d2b44289c Implement stack_addr, stack_load, stack_store for x86-64. (#370) 2018-06-26 06:15:21 -07:00
Lachlan Sneff
b3c3ca331b Removed implicit indirection when computing heap base. (#363)
Fix expected legalized heap_addr
2018-06-16 07:31:52 -07:00
Lachlan Sneff
3686fc2fc7 Fix typos caused by find-and-replace 2018-06-15 18:33:30 -07:00
Lachlan Sneff
5c320a0d30 Change GlobalVar to GlobalValue 2018-06-15 18:33:30 -07:00
Sergey Pepyakin
a8923e2185 Add 64-bit versions. 2018-06-12 11:54:23 -07:00
Sergey Pepyakin
399860e2aa Encode bnot on x86. 2018-06-12 11:54:23 -07:00
Dan Gohman
3027579cbe Add a test for instruction shrinking. 2018-06-12 05:02:25 -07:00
Dan Gohman
0daa560368 Accept redundant alias definitions.
In the text format, allow aliases to be defined multiple times, as long
as they're always aliasing the same value.

write.rs is already emitting redundant aliases, because it emits them at
their uses, so this change allows the parser to be able to parse such
code.
2018-06-12 05:02:25 -07:00
Sergey Pepyakin
73b6468d25 Parsing stack_limit 2018-06-09 13:18:12 -07:00
Sergey Pepyakin
e9111d1de2 Ditch stack_check instruction 2018-06-09 13:18:12 -07:00
Dan Gohman
4e67e08efd Use the target-lexicon crate.
This switches from a custom list of architectures to use the
target-lexicon crate.

 - "set is_64bit=1; isa x86" is replaced with "target x86_64", and
   similar for other architectures, and the `is_64bit` flag is removed
   entirely.

 - The `is_compressed` flag is removed too; it's no longer being used to
   control REX prefixes on x86-64, ARM and Thumb are separate
   architectures in target-lexicon, and we can figure out how to
   select RISC-V compressed encodings when we're ready.
2018-05-30 06:13:35 -07:00
Dan Gohman
c21af29c79 Legalize libcall signatures.
Explicitly legalize signatures created for libcalls.
2018-05-29 10:21:52 -07:00
data-pup
191bab162b Optimize 0.0 floating point constants. (#344)
* Optimize 0.0 floating point constants. Rather than using the existing
process of emitting bit patterns and moving them into floating point
registers, use the `xorps` instruction to zero out the register.

* is_zero predicate function will not accept negative zero. Fixed formatting for encoding recipe and filetests.
2018-05-24 14:16:25 -07:00
Tyler McMullen
f636d795c5 load_complex and store_complex instructions (#309)
* Start adding the load_complex and store_complex instructions.

N.b.:
The text format is not correct yet. Requires changes to the lexer and parser.
I'm not sure why I needed to change the RuntimeError to Exception yet. Will fix.

* Get first few encodings of load_complex working. Still needs var args type checking.

* Clean up ModRM helper functions in binemit.

* Implement 32-bit displace for load_complex

* Use encoding helpers instead of doing them all by hand

* Initial implementation of store_complex

* Parse value list for load/store_complex with + as delimiter. Looks nice.

* Add sign/zero-extension and size variants for load_complex.

* Add size variants of store_complex.

* Add asm helper lines to load/store complex bin tests.

* Example of length-checking the instruction ValueList for an encoding. Extremely questionable implementation.

* Fix Python linting issues

* First draft of postopt pass to fold adds and loads into load_complex. Just simple loads for now.

* Optimization pass now works with all types of loads.

* Add store+add -> store_complex to postopt pass

* Put complex address optimization behind ISA flag.

* Add load/store complex for f32 and f64

* Fixes changes to lexer that broke NaN parsing.

Abstracts away the repeated checks for whether or not the characters
following a + or - are going to be parsed as a number or not.

* Fix formatting issues

* Fix register restrictions for complex addresses.

* Encoding tests for x86-32.

* Add documentation for newly added instructions, recipes, and cdsl changes.

* Fix python formatting again

* Apply value-list length predicates to all LoadComplex and StoreComplex instructions.

* Add predicate types to new encoding helpers for mypy.

* Import FieldPredicate to satisfy mypy.

* Add and fix some "asm" strings in the encoding tests.

* Line-up 'bin' comments in x86/binary64 test

* Test parsing of offset-less store_complex instruction.

* 'sNaN' not 'sNan'

* Bounds check the lookup for polymorphic typevar operand.

* Fix encodings for istore16_complex.
2018-05-09 14:07:00 -05:00
Steffen Butzer
5aa84a744b windows fastcall (x64) call convention (#314)
* initial set of work for windows fastcall (x64) call convention

- call conventions: rename `fastcall` to `windows_fastcall`
- add initial set of filetests
- ensure arguments are written after the shadow space/store (offset-wise)
  The shadow space available before the arguments (range 0..32)
  is not used as spill space yet.

* address review feedback
2018-05-09 13:18:30 -05:00
Dan Gohman
5b69930e03 Legalize bnot using xor with -1. 2018-05-05 11:21:06 -05:00
Pat Hickey
bb612af37a x86 recipes: emit StackOverflow trap for all sp-relative loads and stores (#325)
* x86 recipes: emit StackOverflow trap for all sp-relative loads and stores

* x86 recipes: emit StackOverflow trap for push and pop

* x86 binary filetests: add stk_ovf trap annotations
2018-05-03 18:09:07 -07:00
Dan Gohman
7e1f157692 Use %esp rather than %rsp in x86-32 test comments. 2018-05-02 09:41:34 -07:00
Dan Gohman
5bcfd47f3f Remove the non-REX encodings for regmove et al.
regmove, regfill, and regspill have immediates which aren't value
operands, so they aren't in the set of things that can be described by
the existing constraint system. Consequently, constraints saying that
the non-REX encodings only support registers that don't need REX
prefixes don't work. Fow now, just remove the non-REX encodings, so
that they don't get selected when they aren't valid.

This fixes the last known issue with instruction shrinking, so it can
be re-enabled.
2018-04-22 22:31:56 -07:00
Dan Gohman
3b1d805758 Stack overflow checking with stack probes.
This adds a libcall name, a calling convention, and settings for
emitting stack probes, and implements them for x86 system_v ABIs.
2018-04-22 21:52:12 -07:00
Dan Gohman
c5b15c2396 Refactor calling convention settings. (#304)
Add a calling-convention setting to the `Flags` used as part of the
`TargetIsa`. This allows Cretonne code that generates calls to use the
correct convention, such as when emitting libcalls during legalization
or when the wasm frontend is decoding functions. This setting can be
overridden per-function.

This also adds "fast", "cold", and "fastcall" conventions, with "fast"
as the new default. Note that "fast" and "cold" are not intended to be
ABI-compatible across Cretonne versions.

This will also ensure Windows users will get an `unimplemented!` rather
than silent calling-convention mismatches, which reflects the fact that
Windows calling conventions are not yet implemented.

This also renames SpiderWASM, which isn't camel-case, to Baldrdash,
which is, and which is also a more relevant name.
2018-04-22 21:35:18 -07:00
Dan Gohman
dfb24f1934 Fix x86 encoding of uextend/sextend from 8-bit inputs.
The x86-32 and non-REX encodings of movsbl and movzbl require one of
the ABCD registers as input.
2018-04-20 12:12:29 -07:00
Dan Gohman
cb3c5a1384 Revert the change to this test that accompanied the shrinking pass too. 2018-04-19 18:57:59 -07:00