Commit Graph

79 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
662e256e3f Generate a table of encoding recipe names for each ISA.
This will be used to pretty-print encodings in the textual IR.
2016-08-30 13:51:34 -07:00
Jakob Stoklund Olesen
fc6cb2eac1 Add an isa/encoding module.
Define data types for the level 1 and level 2 hash tables. These data types are
generic over the offset integer type so they can be twice as compact for
typically small ISAs.

Use these new types when generating encoding hash tables.

Emit both level 1 and level 2 hash tables.

Define generic functions that perform lookups in the encoding tables.

Implement the TargetIsa::encode() method for RISC-V using these building
blocks.
2016-08-30 07:49:29 -07:00
Jakob Stoklund Olesen
6145f4ca13 Add an is_64bit shared setting.
Many ISAs and 64-bit and 32-bit variants. Use a shared is_64bit setting to
distinguish.
2016-08-30 07:49:29 -07:00
Jakob Stoklund Olesen
dcf0b49b07 Add comments to the level2 hash tables concatenation.
The large LEVEL2 table consists on multiple concatenated constant hash tables.
Add comments to the generated output delineating the individual tables.
2016-08-30 07:49:29 -07:00
Jakob Stoklund Olesen
adde184042 Generate level 2 hashtables.
All of the level 2 hashtables are concatenated into one constant array per ISA.
2016-08-26 17:15:05 -07:00
Jakob Stoklund Olesen
a21935a5a2 Add 32-bit ops to RV64.
The 32-bit arithmetic instructions are encoded differently in the RISC-V 64-bit
mode.
2016-08-26 16:13:22 -07:00
Jakob Stoklund Olesen
0c8f251bee Emit encoding lists (WIP).
Compute the u16 representation of encoding lists and emit a big table
concatenating all of them. Use the UniqueSeqTable to share some table space
between CPU modes.
2016-08-26 16:07:18 -07:00
Jakob Stoklund Olesen
6a8a4c43c2 Collect and number all active encoding recipes.
The recipes are shared across CPU modes.
2016-08-26 15:14:33 -07:00
Jakob Stoklund Olesen
15b5576d99 Generate type numbers at meta-time.
We need to generate hash tables keyed by types, so the Python scripts need to
know the index used to represent types in Rust code.

To enforce this, add a new gen_types.py script which generates constant
definitions for the ir/types module.

Also generate constants for common SIMD vector sizes.
2016-08-26 14:02:32 -07:00
Jakob Stoklund Olesen
3e40c3e454 Flake8 lints. 2016-08-26 09:45:10 -07:00
Jakob Stoklund Olesen
c1ae0c99ed Move predicate collection into TargetISA.
Add a TargetISA.finish() method which computes derived data structures after
the ISA definitions have been loaded.
2016-08-26 09:37:05 -07:00
Jakob Stoklund Olesen
7cb975ce63 Add string conversions for predicates and encodings.
This is just used for printing better comments in generated code.
2016-08-26 08:50:47 -07:00
Jakob Stoklund Olesen
0c6e0e9cb7 Generate encoding tables. (WIP).
Amend build script to generate an encodings-<isa>.rs file for each target ISA.

Emit a function that can evaluate instruction predicates.

Describe the 3-level tables used for representing insrruction encoding tables.
Add Python classes representing the tables.

The generated code is incomplete and not used anywhere yet.
2016-08-25 16:19:10 -07:00
Jakob Stoklund Olesen
c166279bb9 Call function in the predicates module.
When generating Rust code for an instruction predicate, call the corresponding
function in the predicates module, using a qualified name.

We don't have methods corresponding to the predicates.
2016-08-25 14:26:44 -07:00
Jakob Stoklund Olesen
fb7997aa38 Collect list of CPU modes in TargetISA.
Fix a typo nearby.
2016-08-25 11:38:40 -07:00
Jakob Stoklund Olesen
a24daf5ded Add a predicate_leafs() method.
This collects all of the leaf predicates that go into a compound predicate.
Current leaf predicates are:

- Settings for ISA predicates, and
- FieldPredicates for instruction predicates.
2016-08-25 09:50:23 -07:00
Jakob Stoklund Olesen
eb03abe864 Allow predicates on both EncRecipe and Encoding.
If both specify a predicate, combine them with 'And'.
2016-08-24 16:02:41 -07:00
Jakob Stoklund Olesen
586fbbc797 Add RISC-V arithmetic w/immediate operand encodings.
Add new instruction predicates to support the 'I' encoding recipe: IsSignedInt,
IsUnsignedInt used to test that an immediate operand is in the allowed range.
2016-08-24 08:53:44 -07:00
Jakob Stoklund Olesen
b8509c6273 Add bitwise operations with an immediate operand. 2016-08-24 08:41:05 -07:00
Jakob Stoklund Olesen
077c5ce1f6 Create format fields for immediate operands.
Each InstructionFormat instance gets data members corresponding to its immediate
operands, so the can be referred to as BinaryImm.imm, for example.

This will be used to construct instruction predicates.
2016-08-24 08:40:51 -07:00
Jakob Stoklund Olesen
9c5637902c Track the default member name for immediate operands.
Usually an instruction firmat has only a single immediate operand called 'imm',
or 'cond' if it is one of the condigtion codes. Add a 'default_member' field to
ImmediateKind to keep track of this default member name in the InstructionData
struct.
2016-08-24 08:40:51 -07:00
Jakob Stoklund Olesen
2f322e3d0e Add script for Python 3 compat checks. 2016-08-24 08:40:51 -07:00
Jakob Stoklund Olesen
9da6847805 Python 3 compat.
Try to keep our Python sources compatible with both Python 2.7 and 3.

Check with 'pylint --py3k' and 'python -3'.
2016-08-23 16:35:58 -07:00
Jakob Stoklund Olesen
24870f0db9 Add RISC-V encodings for imediate shifts.
Also add the 32-bit shift instructions for RV64.
2016-08-19 15:56:09 -07:00
Jakob Stoklund Olesen
08168e9d50 Add rotate and shift instructions with immediate amounts. 2016-08-19 15:56:09 -07:00
Jakob Stoklund Olesen
c998c79fe8 Generate code to precompute predicates.
Each ISA predicate is assigned a bit the the Flags struct, and a corresponding
method is generated.
2016-08-12 10:13:50 -07:00
Jakob Stoklund Olesen
13d33d5a7a Introduce predicates.
Predcates are boolean functions. There will be ISA predicates and instruction
predicates.

The ISA predicates will be turned into member functions on the generated Flags
structs.
2016-08-11 16:40:54 -07:00
Jakob Stoklund Olesen
1087aa67f0 Implement the machinery to create a TargetIsa.
Add an isa::lookup() function which serves as a target registry for creating
Box<TargetIsa> trait objects.

An isa::Builder makes it possible to confugure the trait object before it is
created.
2016-08-11 11:52:11 -07:00
Jakob Stoklund Olesen
6e6ad1ef52 Add a settings::Builder data type.
- Move detail data structures into a settings::detail module to avoid polluting
  the settings namespace.

- Rename generated data types to 'Flags' in anticipation of computed predicate
  flags that can't be set. The Flags struct is immutable.

- Use a settings::Builder struct to manipulate settings, then pass it to
  Flags::new().
2016-08-10 15:47:06 -07:00
Jakob Stoklund Olesen
56cb249e13 Add support for enumerated settings.
The EnumSetting objects can take one of 256 named values.
2016-08-09 15:13:43 -07:00
Jakob Stoklund Olesen
530234ad32 Add settings::Stringwise.
This trait allows settings to be manipulated as strings, using descriptors and
constant hash-table lookups.

Amend gen_settings.py to generate the necessary constant tables.
2016-08-09 15:04:42 -07:00
Jakob Stoklund Olesen
4efb0efb44 Add ISA-dependent settings for RISC-V. 2016-08-05 16:19:46 -07:00
Jakob Stoklund Olesen
1925c1b2c2 Scaffolding for defining settings.
Settings can be defined globally or per-ISA. They are available to code through
a generated Settings struct with accessor methods per setting.
2016-08-05 15:50:57 -07:00
Jakob Stoklund Olesen
1a4d07d437 Rename meta/target -> meta/isa.
Clarify terminology by always referring to a 'Target ISA' instead of just
'Target'. Use 'isa' as a module name instead of 'target' both in Rust and Python
code.

This is only to clarify terminology and not at all because Cargo insists on
using the 'target' sub-directory for build products. Oh, no. Not at all.
2016-08-04 11:50:19 -07:00
Jakob Stoklund Olesen
5a8293427d Verify that type variables have been fully bound.
The shift instructions have two type variables since the shift amount can be a
differently sized integer. Fix the RISC-V shift encodings to reflect this, and
allow i64 registers to be shifted by an i32 amount.
2016-08-04 10:21:48 -07:00
Jakob Stoklund Olesen
a1cc8af186 Use dot syntax to bind type variables on instructions.
Encodings need to refer to concrete instances of polymorphic instructions by
binding type variables. Allow dot syntax like iadd.i32 to do that.
2016-08-03 16:30:47 -07:00
Jakob Stoklund Olesen
4987282bbb Add an Encoding meta-language class.
Start adding some RISC-V encodings too as a way of testing the ergonomics.
2016-08-03 16:04:29 -07:00
Jakob Stoklund Olesen
66f14138bb Add an EncRecipe meta-language class.
Move the CPUMode reference from EncRecipe to the Encoding itself, allowing
EncRecipes to be shared between CPU modes. At least RISC-V should be able to
share some recipes between RV32 and RV64 modes.
2016-08-03 12:06:21 -07:00
Jakob Stoklund Olesen
eed6adb413 Add a CPUMode meta-language class. 2016-08-03 11:20:13 -07:00
Jakob Stoklund Olesen
3839281414 Define a return instruction.
It is possible to return multiple values from a function, so ReturnData contains
a VariableArgs instance.

We don't want return instructions to appear as 'return (v1)', so tweak the
printing of VariableArgs so the parantheses are added externally.
2016-07-08 16:19:26 -07:00
Jakob Stoklund Olesen
b710dd8464 Define floating point conversion instructions. 2016-07-08 11:20:19 -07:00
Jakob Stoklund Olesen
62e96f4d3e Metadefs for integer reduce and extend operations.
Naming is interesting here. Since 'truncate' refers to removing the least
significant digits, use 'ireduce' instead. The 'extend' use is fairly
established. Don't abbreviate, avoid unfortunate modern vernacular.
2016-07-07 18:17:16 -07:00
Jakob Stoklund Olesen
c82b772315 Add meta definition for bitcast.
This instruction uses two type variables: input and output. Make sure that our
parser can handle it. The output type variable annotation is mandatory.

Add a ValueTypeSet::example() method which is used to provide better diagnostics
for a missing type variable.
2016-07-07 14:01:00 -07:00
Jakob Stoklund Olesen
81ca406dd0 Add meta definitions for floating point operations.
Rename the Select instruction format to Ternary since it is also used by the fma
instruction.
2016-07-07 13:16:24 -07:00
Jakob Stoklund Olesen
5d8fb0fdc3 Define icmp and fcmp comparison instructions.
Add new intcc and floatcc operand types for the immediate condition codes on
these instructions.

Add new IntCompare and FloatCompare instruction formats.

Add a generic match_enum() parser function that can match any identifier-like
enumerated operand kind that implements FromStr.

Define the icmp and fcmp instructions in case.py. Include documentation for the
condition codes with these two instructions.
2016-07-07 11:43:12 -07:00
Jakob Stoklund Olesen
8ebf6e775d Parse controlling type variable. Do basic type inference.
Replace the make_multi_inst() function with a make_inst_results() which uses
the constraint system to create the result values. A typevar argument ensures
that this function does not infer anything from the instruction data arguments.
These arguments may not be valid during parsing.

Implement basic type inference in the parser. If the designated value operand
on a polymorphic instruction refers to a known value, use that to infer the
controlling type variable.

This simple method of type inference requires the operand value to be defined
above the use in the text. Since reordering the EBBs could place a dominating
EBB below the current one, this is a bit fragile. One possibility would be to
require the value is defined in the same EBB. In all other cases, the
controlling typevar should be explicit.
2016-06-01 10:38:34 -07:00
Jakob Stoklund Olesen
96cfb40507 Add vector instructions.
Use derived type variables with the 'LaneOf' function.

Add u8 immediates to be used for lane indexes and bit shifts.
2016-05-20 15:36:03 -07:00
Jakob Stoklund Olesen
cc71744b74 Implement select and vselect instructions.
This gives us the opportunity to use the AsBool derived type variables and a
Select instruction format with a non-default typevar_operand setting.
2016-05-20 15:11:17 -07:00
Jakob Stoklund Olesen
ad01af40e4 Generate value type constraints.
Add an Opcode::constraints() method which returns an OpcodeConstraints object.
This object provides information on instruction polymorphism and how many
results is produced.

Generate a list of TypeSet objects for checking free type variables. The type
sets are parametrized rather than being represented as fully general sets.

Add UniqueTable and UniqueSeqTable classes to the meta code generator. Use for
compressing tabular data by removing duplicates.
2016-05-20 14:43:16 -07:00
Jakob Stoklund Olesen
c3b76b67ca Verify restrictions on polymorphism.
Add a typevar_operand argument to the InstructionFormat constructor which
determines the operand used for inferring the controlling type variable.

Identify polymorphic instructions when they are created, determine if the
controlling type variable can be inferred from the typevar_operand, and verify
the use of type variables in the other operands.

Generate type variable summary in the documentation, including how the
controlling type variable is inferred.
2016-05-19 14:59:46 -07:00