Commit Graph

6452 Commits

Author SHA1 Message Date
bjorn3
762b5e494b Legalize brz.i128 and brnz.i128 2019-09-07 09:55:09 -07:00
bjorn3
83ac6dd4d4 [meta] Add some Debug derives 2019-09-07 09:55:09 -07:00
bjorn3
a43a3a5e9f [meta] Give a nicer error message when a legalization uses an incorrect number of arguments 2019-09-07 09:55:09 -07:00
bjorn3
8d0e8f8931 [meta] Fix legalization in presence of varargs 2019-09-07 09:55:09 -07:00
bjorn3
d9ee08c088 Fix bug when i128 ebb param is unused 2019-09-07 09:55:09 -07:00
bjorn3
44ecc9c3d0 [WIP] 2019-09-07 09:55:09 -07:00
bjorn3
954a2007d2 Fix isplit legalization 2019-09-07 09:55:09 -07:00
bjorn3
f04b334b20 Rustfmt 2019-09-07 09:55:09 -07:00
bjorn3
6f7d57a71f Handle isplit when it is not the result of a legalization 2019-09-07 09:55:09 -07:00
bjorn3
c1553194a7 Fix WideInt max size in insturctions.py 2019-09-07 09:55:09 -07:00
bjorn3
b7ec055575 Use little endian byte order in i128 test 2019-09-07 09:55:09 -07:00
bjorn3
4305fe37a0 Add test 2019-09-07 09:55:09 -07:00
bjorn3
c9a25abbc4 Basic i128 support 2019-09-07 09:55:09 -07:00
Marcin Mielniczuk
85a41d449c Treat FIFOs' type as __WASI_FILETYPE_UNKNOWN. 2019-09-06 20:38:50 -07:00
Marcin Mielniczuk
c2d2b8066b Add .vscode to .gitignore 2019-09-06 20:38:50 -07:00
Marcin Mielniczuk
d308c47822 Add a no-op implementation of fd_advise on Windows
Windows apparently has no similar syscall available.
2019-09-06 18:06:51 -07:00
Zack Slayton
1497825173 Updating link to Fuchsia blog post 2019-09-06 14:19:17 -07:00
Nicolas B. Pierron
3b0e244316 Fix binary64.clif to work with fold_redundant_jump. (#987) 2019-09-06 14:29:04 -06:00
Nicolas B. Pierron
1c5711c12b Basic Block: Fix IR builder library example. (#989) 2019-09-06 14:27:02 -06:00
Nicolas B. Pierron
592f5445dd Fix legalize-br-table test case for basic blocks. (#990) 2019-09-06 14:26:17 -06:00
Nicolas B. Pierron
891944dba1 Generate basic-blocks instead of Ebb in frontend::switch. (#981) 2019-09-06 14:07:06 -06:00
Benjamin Bouvier
e35cf861db Fixes #984: Add a isa::lookup_by_name function;
This removes the explicit dependency on target-lexicon for the embedder,
which can instead use the ISA's name directly. It can simplify
dependency management, in particular avoid the need for synchronizing
the target-lexicon dependencies versions.

It also tweak the error when an ISA isn't built as part of Cranelift to
be a SupportDisabled error; this was dead code before this.
2019-09-06 16:19:01 +02:00
Benjamin Bouvier
dca2e7e9a7 Add basic test for the pinned register; 2019-09-06 16:18:27 +02:00
Benjamin Bouvier
c1609b70e8 [codegen] Allow using the pinned register as the heap base via a setting; 2019-09-06 16:18:27 +02:00
Benjamin Bouvier
660b8b28b8 [codegen] Add a pinned register that's entirely under the control of the user; 2019-09-06 16:18:27 +02:00
Benjamin Bouvier
d1d2e790b9 [meta] Morph a few pub into pub(crate), and remove dead code; 2019-09-06 15:47:20 +02:00
Benjamin Bouvier
8fba449b7b [meta] Introduce the EntityRefs structure instead of using dynamic lookup; 2019-09-06 15:47:20 +02:00
Benjamin Bouvier
29e3ec51c1 [meta] Introduce the Immediates structure instead of using dynamic lookup; 2019-09-06 15:47:20 +02:00
stefson
bafd79330d upgrade to latest target-lexicon 0.8.1
this fixes the compile for arm and aarch64

reported via https://github.com/CraneStation/cranelift/issues/977
2019-09-06 15:20:04 +02:00
Dan Gohman
d858ebb4aa Bump version to 0.42.0 2019-09-05 17:36:04 -07:00
Jakub Konka
2941c2022f Refactor wasmtime-wasi crate
Changes:
* uses Rust edition 2018
* returns wasm32 errno directly rather than relying on
  wasi_common::{host, memory} modules
* wraps extraction of memory and WASI context in a macro
2019-09-05 17:35:12 -07:00
Dan Gohman
6a09c5538f Update lightbeam to latest master. 2019-09-05 17:15:55 -07:00
Artur Jamro
ade5c0dd2f Trace log access to cache system 2019-09-05 17:14:32 -07:00
Artur Jamro
f65d8f2372 Refactor: cascade of matches in cache system 2019-09-05 17:14:32 -07:00
Artur Jamro
fad70eb8bb Refactor usage of SecondaryMap impls (serde, PartialEq) 2019-09-05 17:14:32 -07:00
Andrew Brown
bb0a443747 Add stubs for constant relocation in RelocSink 2019-09-05 17:14:32 -07:00
Ujjwal Sharma
1a099f2e8c [codegen] change operand type from bool to iflag for isub borrow variants
The type of the borrow operands for the borrow variants of the isub
instruction (isub_bin, isub_bout, isub_borrow) was bool for compatibility
reasons for isa/riscv. Since support for these instructions on RISC
architectures has been temporarily suspended, we can safely change the
type to iflags.
2019-09-05 19:28:33 +02:00
Ujjwal Sharma
9fb8bdd6d5 [codegen] remove support for isub borrow variants on riscv
Previously, the borrow variants of isub (isub_bin, isub_bout and
isub_borrow) were being legalized for isa/riscv since RISC architectures
lack a flags register.

This forced us to return and accept booleans for these operations, which
proved to be problematic and inconvenient, especially for x86.

This commit removes support for said statements and all dependent
statements for isa/riscv so that we can work on a better legalization
strategy in the future.
2019-09-05 19:28:33 +02:00
Ujjwal Sharma
dce8ad8229 [codegen] add encodings for isub borrow variants
Add encodings for isub borrow variants (isub_bout, isub_bin,
isub_borrow) for x86_32, enabling the legalization for isub.i64 to work.

Bug: https://bugzilla.mozilla.org/show_bug.cgi?id=1576675
Bug: https://github.com/CraneStation/cranelift/issues/765
2019-09-05 19:28:33 +02:00
Benjamin Bouvier
1c28d43f00 [meta] Remove unused immfield index in the FormatField; 2019-09-05 17:55:03 +02:00
Benjamin Bouvier
38656cce35 [meta] Simplify and comment instruction building a bit; 2019-09-05 17:55:03 +02:00
Benjamin Bouvier
0acddc08ea [meta] Split FormatBuilder::imm to avoid the extra Into<> parameter type; 2019-09-05 17:55:03 +02:00
Benjamin Bouvier
8a9384f869 Tweak comments; 2019-09-05 17:55:03 +02:00
Sean Stangl
26b88ae7b5 Limit redundant jump folding to only fold parameterless target blocks (#972) 2019-09-05 08:21:29 -06:00
Ujjwal Sharma
ea919489ee [codegen] add encodings for iadd carry variants (#961)
* [codegen] add encodings for iadd carry variants

Add encodings for iadd carry variants (iadd_cout, iadd_cin, iadd_carry)
for x86_32, enabling the legalization for iadd.i64 to work.

* [codegen] remove support for iadd carry variants on riscv

Previously, the carry variants of iadd (iadd_cin, iadd_cout and
iadd_carry) were being legalized for isa/riscv since RISC architectures
lack a flags register.

This forced us to return and accept booleans for these operations, which
proved to be problematic and inconvenient, especially for x86.

This commit removes support for said statements and all dependent
statements for isa/riscv so that we can work on a better legalization
strategy in the future.

* [codegen] change operand type from bool to iflag for iadd carry variants

The type of the carry operands for the carry variants of the iadd
instruction (iadd_cin, iadd_cout, iadd_carry) was bool for compatibility
reasons for isa/riscv. Since support for these instructions on RISC
architectures has been temporarily suspended, we can safely change the
type to iflags.
2019-09-05 15:03:13 +02:00
Nicolas B. Pierron
7e398af999 Basic-block: Insert regmove instructions in new blocks dedicated to hold the diversions. 2019-09-05 14:55:35 +02:00
Pat Hickey
0f4101a509 upgrade to faerie 0.11.0
which fixes a use-after-free bug under the hood
2019-09-04 15:12:17 -07:00
Pat Hickey
89d741f8ae upgrade to target-lexicon 0.8.0
* the target-lexicon crate no longer has or needs the std feature
  in cargo, so we can delete all default-features=false, any mentions
  of its std feature, and the nostd configs in many lib.rs files
* the representation of arm architectures has changed, so some case
  statements needed refactoring
2019-09-04 15:12:17 -07:00
Artur Jamro
364300f6cf Use target triple in cache directory hierarchy (#300) 2019-09-04 13:12:27 -07:00
Andrew Brown
cc63d9df49 Add SIMD WASM spec tests from newly updated testsuite repo (#319)
See https://github.com/WebAssembly/testsuite
2019-09-04 11:42:50 -07:00