Use the new ISA predicate numbering to emit ISA predicate instructions in the
encoding tables.
Properly decode the ISA predicate number in RISC-V and add tests for RV32M iwth
and without 'supports_m' enabled.
Define data types for the level 1 and level 2 hash tables. These data types are
generic over the offset integer type so they can be twice as compact for
typically small ISAs.
Use these new types when generating encoding hash tables.
Emit both level 1 and level 2 hash tables.
Define generic functions that perform lookups in the encoding tables.
Implement the TargetIsa::encode() method for RISC-V using these building
blocks.
Compute the u16 representation of encoding lists and emit a big table
concatenating all of them. Use the UniqueSeqTable to share some table space
between CPU modes.
Amend build script to generate an encodings-<isa>.rs file for each target ISA.
Emit a function that can evaluate instruction predicates.
Describe the 3-level tables used for representing insrruction encoding tables.
Add Python classes representing the tables.
The generated code is incomplete and not used anywhere yet.
