wasmtime

T0b1/wasmtime

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Commit Graph

Author	SHA1	Message	Date
Jakob Stoklund Olesen	c4db4c124b	Begin an Intel-specific instruction group. Add instructions representing Intel's division instructions which use a numerator that is twice as wide as the denominator and produce both the quotient and remainder. Add encodings for the x86_[su]divmodx instructions.	2017-07-18 11:20:00 -07:00
Jakob Stoklund Olesen	34f7b93482	Add stubs for Intel and ARM architectures. The Intel ISA handles both 32-bit and 64-bit code. ARM is split into separate arm32 and arm64 ISAs since the architectures have little in common in instruction encodings and register files.	2016-11-11 11:32:05 -08:00

Author

SHA1

Message

Date

Jakob Stoklund Olesen

c4db4c124b

Begin an Intel-specific instruction group.

Add instructions representing Intel's division instructions which use a
numerator that is twice as wide as the denominator and produce both the
quotient and remainder.

Add encodings for the x86_[su]divmodx instructions.

2017-07-18 11:20:00 -07:00

Jakob Stoklund Olesen

34f7b93482

Add stubs for Intel and ARM architectures.

The Intel ISA handles both 32-bit and 64-bit code.

ARM is split into separate arm32 and arm64 ISAs since the architectures
have little in common in instruction encodings and register files.

2016-11-11 11:32:05 -08:00

2 Commits