Dan Gohman
20899d04a1
Fix "Title overline too short." warnings in more *.rst files.
2018-07-19 11:08:53 -07:00
Dan Gohman
f4dbd38a4c
Rename Cretonne to Cranelift!
2018-07-13 09:15:16 -07:00
Dan Gohman
1c760ab179
Rename intel to x86.
...
x86 is the more accurate name, as there are non-Intel x86 implementations.
Fixes #263 .
2018-04-12 10:02:16 -07:00
Dan Gohman
8387c53c3f
Fix a typo.
2017-10-20 16:01:39 -07:00
Jakob Stoklund Olesen
250c515ba9
Update the register allocator document.
...
- We have a coalescing pass which puts the code in CSSA form.
- We do not have an EBB argument fixup pass. This isn't needed with
CSSA.
2017-10-20 15:15:22 -07:00
Dan Gohman
4a5d48fe11
Documentation fixes ( #103 )
...
* Clarify that extended basic blocks are abbreviated as EBB.
* Fix typo.
* Fix a typo.
* Fix typos.
* Use the same phrase to indicate scalar-only as other places in the doc.
* Mention that `band_imm` and friends are scalar-only.
And mention that they're equivalent to their respective
non-immediate-form counterparts.
2017-06-22 12:01:32 -07:00
Andrea Canciani
fd3cd153ed
Fix some typos in the documentation
...
These were found by the spellchecker.
2017-01-27 09:51:22 -08:00
Jakob Stoklund Olesen
32193d21a2
Update regalloc document to reflect implementation.
2017-01-19 11:04:11 -08:00
Jakob Stoklund Olesen
fd412b49e1
Start a design document for the Cretonne register allocator.
2016-11-21 17:00:16 -08:00
