Commit Graph

308 Commits

Author SHA1 Message Date
Joey Gouly
ad9be0d445 arm64: Support bool constants
Copyright (c) 2020, Arm Limited.
2020-04-21 12:24:57 +02:00
bjorn3
cb1c9ef085 Fix printing of LoadAddr 2020-04-18 13:24:06 +02:00
bjorn3
4960c9a0c6 Add tests for stack_{addr,load,store} 2020-04-18 13:24:06 +02:00
Chris Fallin
5e53482a13 arm64: Support less-than-64-bit integers in Bitrev, Clz, Cls, and Popcnt instructions.
Includes a temporary bugfix for popcnt with 32-bit operand. The popcnt
issue was initially identified by Benjamin Bouvier <public@benj.me>, and
the root cause was debugged by Joey Gouly <joey.gouly@arm.com>. This
patch is simply a quick fix that zero-extends the operand to 64 bits;
Joey plans to contribute a more permanent fix shortly (tracked in
 #1537).
2020-04-17 16:42:46 -07:00
Andrew Brown
3f47291f2e Add x86 implentation of 8x16 ushr
This involves some large mask tables that may hurt code size but reduce the number of instructions. See https://github.com/WebAssembly/simd/issues/117 for a more in-depth discussion on this.
2020-04-17 11:59:47 -07:00
Andrew Brown
65856987cd Add const_addr instruction
This new instruction calculates the effective address of a constant in the constant pool using LEA (x86).
2020-04-17 11:59:47 -07:00
Andrew Brown
fa35d88878 Verify that constant values are the correct size
Since we now allow constants of any size, we have to verify that `vconst` (currently the only user of the constant pool) is accessing constants that match its controlling type.
2020-04-17 11:59:47 -07:00
Andrew Brown
0672d1dc0f Declare constants in the function preamble
This allows us to give names to constants in the constant pool and then use these names in the function body. The original behavior, specifiying the constant value as an instruction immediate, is still supported as a shortcut but some filetests had to change since the canonical way of printing the CLIF constants is now in the preamble.
2020-04-17 11:59:47 -07:00
Chris Fallin
2b68abed6a Add vcode test for floating-point, and fix two FP bugs.
- Added a filetest for the vcode output of lowering every handled FP opcode.

- Fixed two bugs that were discovered while going through the lowerings:
  - Saturating FP->int operators would return `u{32,64}::MIN` rather than
    `0` for a NaN input.
  - `fcopysign` did not mask off the sign bit of the value whose sign is
    overwritten.

These probably would have been caught by Wasm conformance tests soon
(and the validity of these lowerings will ultimately be tested this way)
but let's get them right by inspection, too!
2020-04-16 13:43:52 -07:00
Peter Huene
f7e9f86ba9 Refactor unwind generation in Cranelift.
This commit makes the following changes to unwind information generation in
Cranelift:

* Remove frame layout change implementation in favor of processing the prologue
  and epilogue instructions when unwind information is requested.  This also
  means this work is no longer performed for Windows, which didn't utilize it.
  It also helps simplify the prologue and epilogue generation code.

* Remove the unwind sink implementation that required each unwind information
  to be represented in final form. For FDEs, this meant writing a
  complete frame table per function, which wastes 20 bytes or so for each
  function with duplicate CIEs.  This also enables Cranelift users to collect the
  unwind information and write it as a single frame table.

* For System V calling convention, the unwind information is no longer stored
  in code memory (it's only a requirement for Windows ABI to do so).  This allows
  for more compact code memory for modules with a lot of functions.

* Deletes some duplicate code relating to frame table generation.  Users can
  now simply use gimli to create a frame table from each function's unwind
  information.

Fixes #1181.
2020-04-16 11:15:32 -07:00
Chris Fallin
7da6101732 Merge pull request #1494 from cfallin/arm64-merge
Add new `MachInst` backend and ARM64 support.
2020-04-16 10:02:02 -07:00
Chris Fallin
48cf2c2f50 Address review comments:
- Undo temporary changes to default features (`all-arch`) and a
  signal-handler test.
- Remove `SIGTRAP` handler: no longer needed now that we've found an
  "undefined opcode" option on ARM64.
- Rename pp.rs to pretty_print.rs in machinst/.
- Only use empty stack-probe on non-x86. As per a comment in
  rust-lang/compiler-builtins [1], LLVM only supports stack probes on
  x86 and x86-64. Thus, on any other CPU architecture, we cannot refer
  to `__rust_probestack`, because it does not exist.
- Rename arm64 to aarch64.
- Use `target` directive in vcode filetests.
- Run the flags verifier, but without encinfo, when using new backends.
- Clean up warning overrides.
- Fix up use of casts: use u32::from(x) and siblings when possible,
  u32::try_from(x).unwrap() when not, to avoid silent truncation.
- Take immutable `Function` borrows as input; we don't actually
  mutate the input IR.
- Lots of other miscellaneous cleanups.

[1] cae3e6ea23/src/probestack.rs (L39)
2020-04-15 17:21:28 -07:00
Samrat Man Singh
4d34c22a1c Use F64X2 as type when saving and restoring XMM registers
When adding floating-point registers as callee-saved register to
block- and function parameter lists add them as `F64X2` arguments.
2020-04-13 09:48:08 -07:00
Chris Fallin
3de504c24c ARM64 backend, part 11 / 11: filetests for ARM64 VCode.
This patch, the last in the series, adds the filetests for the new ARM64
backend. The filetests cover most of the opcodes, except for the
recently-added floating point support.

This patch contains code written by Julian Seward <jseward@acm.org> and
Benjamin Bouvier <public@benj.me>, originally developed on a side-branch
before rebasing and condensing into this patch series. See the `arm64`
branch at `https://github.com/cfallin/wasmtime` for original development
history.

This patch also contains code written by Joey Gouly
<joey.gouly@arm.com> and contributed to the above branch. These
contributions are "Copyright (c) 2020, Arm Limited."

Co-authored-by: Julian Seward <jseward@acm.org>
Co-authored-by: Benjamin Bouvier <public@benj.me>
Co-authored-by: Joey Gouly <joey.gouly@arm.com>
2020-04-11 17:53:01 -07:00
iximeow
4cca510085 Windows FPRs preservation (#1216)
Preserve FPRs as required by the Windows fastcall calling convention.

This exposes an implementation limit due to Cranelift's approach to stack layout, which conflicts with expectations Windows makes in SEH layout - functions where the Cranelift user desires fastcall unwind information, that require preservation of an ABI-reserved FPR, that have a stack frame 240 bytes or larger, now produce an error when compiled. Several wasm spectests were disabled because they would trip this limit. This is a temporary constraint that should be fixed promptly.

Co-authored-by: bjorn3 <bjorn3@users.noreply.github.com>
2020-04-10 13:27:20 -07:00
Andrew Brown
f56f9fb01c Remove unparseable run commands in existing tests 2020-04-03 13:25:10 -07:00
Andrew Brown
d0daef6f60 Avoid infer_rex() and w() on the same x86 encoding template, resolves #1342
In cranelift x86 encodings, it seemed unintuitive to specialize Templates with both `infer_rex()`` and `w()`: if `w()` is specified, the REX.W bit must be set so a REX prefix is alway required--no need to infer it. This change forces us to write `rex().w()``--it's more explicit and shows more clearly what cranelift will emit. This change also modifies the tests that expected DynRex recipes.
2020-04-02 16:50:07 -07:00
Andrew Brown
e425bfcebd Infer REX prefixes for SIMD load and store with displacement 2020-04-02 11:28:42 -07:00
Andrew Brown
dc874a5b3b Infer REX prefixes for SIMD load_extend 2020-04-02 11:28:42 -07:00
Andrew Brown
54398156ea Add x86 implementation of SIMD load_extend instructions 2020-03-31 11:35:26 -07:00
Andrew Brown
cd900d72db Add tests showing no interference between jump tables and constants 2020-03-30 09:48:05 -07:00
bjorn3
dfe22836e8 Fix the order of the rex2 registers for r_ib_unsigned_gpr (#1424)
Fixes #1423
2020-03-27 14:29:32 -07:00
Andrew Brown
057a0cf44e Organize SIMD arithmetic filetest; add REX-inducing register assignments 2020-03-18 10:12:50 -07:00
Andrew Brown
0d63bd12d8 Infer REX prefix for SIMD operations; fixes #1127
- Convert recipes to have necessary size calculator
- Add a missing binemit function, `put_dynrexmp3`
- Modify the meta-encodings of x86 SIMD instructions to use `infer_rex()`, mostly through the `enc_both_inferred()` helper
- Fix up tests that previously always emitted a REX prefix
2020-03-18 10:12:50 -07:00
Andrew Brown
f12fb29ae1 Add initial SIMD memory filetests 2020-03-17 19:37:55 -07:00
Andrew Brown
8598295bc4 Remove FPR32; fixes #1303
Until #1306 is resolved (some spilling/regalloc issue with larger FPR register banks), this removes FPR32 support. Only Wasm's `i64x2.mul` was using this register class and that instruction is predicated on AVX512 support; for the time being, that instruction will have to make do with the 16 FPR registers.
2020-03-17 12:46:41 -07:00
Andrew Brown
444d021ede Add x86 implementation of fcvt_from_sint 2020-03-17 10:52:03 -07:00
Andrew Brown
fa7481a681 Add x86 implementation of SIMD swizzle instruction 2020-03-06 15:49:53 -08:00
Andrew Brown
4a0f53464a Remove '%test_' prefix from SIMD filetests 2020-03-06 14:57:11 -08:00
Andrew Brown
d19f727850 Refactor SIMD filetests to use a common naming convention
All filetests now should look like `simd-[instruction category]-[test type]`, where `[test type]` is something like `run` or `binemit`.
2020-03-06 14:57:11 -08:00
Andrew Brown
55337abd3f Move filetest misplaced during repo merge 2020-03-06 12:40:27 -08:00
Darin Morrison
d68437e1e6 Update SIMD tests to use hex literals 2020-03-02 08:28:59 -08:00
bjorn3
0a1bb3ba6c Add TLS support for ELF and MachO (#1174)
* Add TLS support
* Add binemit and legalize tests
* Spill all caller-saved registers when necessary
2020-02-25 17:50:04 -08:00
Andrew Brown
032e81fd6f Add x86 SIMD average rounding 2020-02-24 09:48:38 -08:00
Andrew Brown
1a9dc743d1 Infer REX prefix for SIMD load instruction 2020-02-19 09:24:05 -08:00
Andrew Brown
936120dcf9 Infer REX prefix for SIMD store and vconst instructions 2020-02-19 09:24:05 -08:00
Peter Delevoryas
18b40d1101 Add ineg legalization for scalar integer types (#1385) 2020-02-14 13:16:02 -08:00
Ryan Hunt
832666c45e Mass rename Ebb and relatives to Block (#1365)
* Manually rename BasicBlock to BlockPredecessor

BasicBlock is a pair of (Ebb, Inst) that is used to represent the
basic block subcomponent of an Ebb that is a predecessor to an Ebb.

Eventually we will be able to remove this struct, but for now it
makes sense to give it a non-conflicting name so that we can start
to transition Ebb to represent a basic block.

I have not updated any comments that refer to BasicBlock, as
eventually we will remove BlockPredecessor and replace with Block,
which is a basic block, so the comments will become correct.

* Manually rename SSABuilder block types to avoid conflict

SSABuilder has its own Block and BlockData types. These along with
associated identifier will cause conflicts in a later commit, so
they are renamed to be more verbose here.

* Automatically rename 'Ebb' to 'Block' in *.rs

* Automatically rename 'EBB' to 'block' in *.rs

* Automatically rename 'ebb' to 'block' in *.rs

* Automatically rename 'extended basic block' to 'basic block' in *.rs

* Automatically rename 'an basic block' to 'a basic block' in *.rs

* Manually update comment for `Block`

`Block`'s wikipedia article required an update.

* Automatically rename 'an `Block`' to 'a `Block`' in *.rs

* Automatically rename 'extended_basic_block' to 'basic_block' in *.rs

* Automatically rename 'ebb' to 'block' in *.clif

* Manually rename clif constant that contains 'ebb' as substring to avoid conflict

* Automatically rename filecheck uses of 'EBB' to 'BB'

'regex: EBB' -> 'regex: BB'
'$EBB' -> '$BB'

* Automatically rename 'EBB' 'Ebb' to 'block' in *.clif

* Automatically rename 'an block' to 'a block' in *.clif

* Fix broken testcase when function name length increases

Test function names are limited to 16 characters. This causes
the new longer name to be truncated and fail a filecheck test. An
outdated comment was also fixed.
2020-02-07 10:46:47 -06:00
Ryan Hunt
c360007b19 Drop 'basic-blocks' feature (#1363)
* All: Drop 'basic-blocks' feature

This makes it so that 'basic-blocks' cannot be disabled and we can
start assuming it everywhere.

* Tests: Replace non-bb filetests with bb version

* Tests: Adapt solver-fixedconflict filetests to use basic blocks
2020-01-23 22:36:06 -07:00
Ryan Hunt
fc58dd6aff Tests: Add basic test for r32, r64
This commit adds a basic test for reference types on 32/64bit systems.
 * Storing a ref type in a table
 * Loading a ref type from a table
 * Passing ref types to a function
 * Returning ref types from a function
 * `is_null` instruction
 * `is_invalid` instruction
2020-01-23 13:37:11 -06:00
Benjamin Bouvier
3125431ece Address nits from #1325 2020-01-23 09:39:49 +01:00
Sean Stangl
b4c6bfd371 When splitting a const, insert prior to the terminal branch group. (#1325)
* When splitting a const, insert prior to the terminal branch group. Closes #1159

Given code like the following, on x86_64, which does not have i128 registers:

    ebb0(v0: i64):
        v1 = iconst.i128 0
        v2 = icmp_imm eq v0, 1
        brnz v2, ebb1
        jump ebb2(v1)

It would be split to:

    ebb0(v0: i64):
        v1 = iconst.i128 0
        v2 = icmp_imm eq v0, 1
        brnz v2, ebb1
        v3, v4 = isplit.i128 v1
        jump ebb2(v3, v4)

But that fails basic-block invariants. This patch changes that to:

    ebb0(v0: i64):
        v1 = iconst.i128 0
        v2 = icmp_imm eq v0, 1
        v3, v4 = isplit.i128 v1
        brnz v2, ebb1
        jump ebb2(v3, v4)

* Add isplit-bb.clif testcase
2020-01-22 17:14:41 +01:00
jmkrauz
ae6ba1e58c Fix narrow_icmp_imm (#1343) 2020-01-21 15:20:44 +01:00
Benjamin Bouvier
dd497c19e1 Renames Settings ⚠️ (fixes #976) (#1321)
This is a breaking API change: the following settings have been renamed:

- jump_tables_enabled -> enable_jump_tables
- colocated_libcalls -> use_colocated_libcalls
- probestack_enabled -> enable_probestack
- allones_funcaddrs -> emit_all_ones_funcaddrs
2020-01-13 14:42:49 -07:00
Yury Delendik
bd88155483 Refactor unwind; add FDE support. (#1320)
* Refactor unwind

* add FDE support

* use sink directly in emit functions

* pref off all unwinding generation with feature
2020-01-13 10:32:55 -06:00
Andrew Brown
6fe86bcb61 Fix SIMD float comparison encoding (#1285)
The Intel manual uses `CMPNLT` and `CMPNLE` to denote not-less-than and not-less-than-or-equals. These were translated previously to `FloatCC::GreaterThan` and `FloatCC::GreaterThanOrEqual` but should be correctly translated to `FloatCC::UnorderedOrGreaterThanOrEqual` and `FloatCC::UnorderedOrGreaterThan`. This change adds the necessary legalizations to make use of these new encodings.
2020-01-08 09:28:05 -08:00
bjorn3
9bbe378d41 Fix master tests (#1316)
Co-authored-by: Benjamin Bouvier <public@benj.me>
2020-01-06 14:39:04 +01:00
Sean Stangl
cf9e762f16 Add a DynRex recipe type for x86, decreasing the number of recipes (#1298)
This patch adds a third mode for templates: REX inference is requestable
at template instantiation time. This reduces the number of recipes
by removing rex()/nonrex() redundancy for many instructions.
2019-12-19 15:49:34 -07:00
Andrew Brown
4433ad2858 Fix legalization of icmp ugt (#1278)
Previously, the same pattern (pmax + pcmpeq) as `uge` was used but this logic was incorrect for operands with equal values.
2019-12-16 14:14:51 -07:00
Andrew Brown
6181f20326 Fix legalization of SIMD fneg (#1286)
Previously `fsub` was used but this fails when negating -0.0 and +0.0 in the SIMD spec tests; using more instructions, this change uses shifts to create a constant for flipping the most significant bit of each lane with `bxor`.
2019-12-16 10:32:08 -08:00