Commit Graph

3264 Commits

Author SHA1 Message Date
bjorn3
aa0486eb15 Remove offset fields from ConstantPool 2021-10-10 14:47:53 +02:00
bjorn3
d78f436daf Remove reloc_constant
It is no longer used by the new backends
2021-10-10 14:43:55 +02:00
Nick Fitzgerald
dbe01ff51e Remove references to the old postopt pass 2021-10-07 14:44:07 -07:00
Anton Kirilov
a986cf2438 Increase the default code section alignment to 64 KB for AArch64 targets (#3424)
Some platforms such as AArch64 Linux support different memory page
sizes, so we need to be conservative when choosing the code section
alignment (which is equal to the page size) by using the maximum.

Copyright (c) 2021, Arm Limited.
2021-10-07 12:49:40 -05:00
bjorn3
2db3b5b9df Remove code offsets from Function (#3412)
* Remove code offsets from Function

* Remove reloc_jt and fix wasmtime-cranelift
2021-10-07 15:54:00 +02:00
Afonso Bordado
fc33700071 cranelift: Enable umulhi tests for s390x 2021-10-06 20:59:53 +01:00
Chris Fallin
d269271264 Merge pull request #3091 from cratelyn/katie/spooky-entity-impl
🌈 cranelift: Provide an `entity_impl!` variation for external handles
2021-10-06 12:22:46 -07:00
Chris Fallin
df5fa773ef Merge pull request #3413 from bjorn3/no_stack_layout
Remove StackLayoutInfo
2021-10-04 11:17:13 -07:00
bjorn3
a0f777b677 Remove BranchRange 2021-10-04 19:40:58 +02:00
bjorn3
c5c7508289 Remove StackLayoutInfo 2021-10-04 19:39:33 +02:00
bjorn3
b3702f5821 Remove old_signature 2021-10-04 19:39:33 +02:00
Benjamin Bouvier
772176dbfb Cranelift: remove unused EncCursor 2021-10-04 19:11:52 +02:00
Benjamin Bouvier
43a86f14d5 Remove more old backend ISA concepts (#3402)
This also paves the way for unifying TargetIsa and MachBackend, since now they map one to one. In theory the two traits could be merged, which would be nice to limit the number of total concepts. Also they have quite different responsibilities, so it might be fine to keep them separate.

Interestingly, this PR started as removing RegInfo from the TargetIsa trait since the adapter returned a dummy value there. From the fallout, noticed that all Display implementations didn't needed an ISA anymore (since these were only used to render ISA specific registers). Also the whole family of RegInfo / ValueLoc / RegUnit was exclusively used for the old backend, and these could be removed. Notably, some IR instructions needed to be removed, because they were using RegUnit too: this was the oddball of regfill / regmove / regspill / copy_special, which were IR instructions inserted by the old regalloc. Fare thee well!
2021-10-04 10:36:12 +02:00
Alex Crichton
5b3b459ad5 Fix some nightly dead code warnings (#3404)
* Fix some nightly dead code warnings

Looks like the "struct field not used" lint has improved on nightly and
caught a few more instances of fields that were never actually read.

* Fix windows
2021-10-01 14:26:30 -05:00
Benjamin Bouvier
bae4ec6427 Remove ancient register allocation (#3401) 2021-09-30 21:27:23 +02:00
Chris Fallin
b695ca4f9c Merge pull request #3398 from uweigand/s390x-addlogical
s390x: Enable most memory64 tests
2021-09-30 10:38:42 -07:00
Ulrich Weigand
d9e6902b69 s390x: Enable most memory64 tests
* Support full set of ADD LOGICAL / SUBTRACT LOGICAL instructions

* Full implementation of IaddIfcout lowering

* Enable most memory64 tests (except simd and threads)
2021-09-30 18:52:05 +02:00
bjorn3
d590e6bc1f Remove x86 old-backend special case from cranelift-codegen-meta 2021-09-30 18:29:49 +02:00
bjorn3
eb01ba1ed1 Flatten directory structure for cranelift_codegen_meta::isa 2021-09-30 18:29:49 +02:00
bjorn3
551f1c3a14 Remove BindParameter and Bindable 2021-09-30 18:29:49 +02:00
Chris Fallin
937b319e2d Merge pull request #3009 from bjorn3/bye_x86_backend
[RFC] Remove the old x86 backend
2021-09-30 09:20:14 -07:00
Dan Gohman
fa108d9a86 Remove the rsix dependency in cranelift-native. (#3395)
Revert the part of 47490b4383 which
changed cranelift-native to use rsix. It's just one call, and this lets
Cranelift users that don't otherwise depend on rsix to avoid it.
2021-09-30 06:11:29 -07:00
bjorn3
463a88e002 Rename lookup_variant to lookup 2021-09-30 12:42:45 +02:00
bjorn3
4b6d20d03f Fix extend test for AArch64 2021-09-29 19:45:49 +02:00
bjorn3
3fae9e5fa9 Remove outdated tests from cranelift-codegen-meta 2021-09-29 18:43:04 +02:00
bjorn3
a2040542ce Remove unused fields 2021-09-29 18:24:24 +02:00
bjorn3
a646f68553 Remove legacy x86_64 backend tests 2021-09-29 17:37:23 +02:00
bjorn3
53ec12d519 Rustfmt 2021-09-29 16:27:47 +02:00
bjorn3
9e5201d88f Fix all dead-code warnings in cranelift-codegen 2021-09-29 16:27:47 +02:00
bjorn3
3e4167ba95 Remove registers from cranelift-codegen-meta 2021-09-29 16:27:47 +02:00
bjorn3
18bd27e90b Remove legalizer support from cranelift-codegen-meta 2021-09-29 16:27:45 +02:00
bjorn3
d499933612 Remove encoding generation from cranelift-codegen-meta 2021-09-29 16:23:58 +02:00
bjorn3
d8818c967e Fix all dead-code warnings in cranelift-codegen-meta 2021-09-29 16:23:58 +02:00
bjorn3
59e18b7d1b Remove the old riscv backend 2021-09-29 16:23:57 +02:00
bjorn3
9e34df33b9 Remove the old x86 backend 2021-09-29 16:13:46 +02:00
Alex Crichton
1ee2af0098 Remove the lightbeam backend (#3390)
This commit removes the Lightbeam backend from Wasmtime as per [RFC 14].
This backend hasn't received maintenance in quite some time, and as [RFC
14] indicates this doesn't meet the threshold for keeping the code
in-tree, so this commit removes it.

A fast "baseline" compiler may still be added in the future. The
addition of such a backend should be in line with [RFC 14], though, with
the principles we now have for stable releases of Wasmtime. I'll close
out Lightbeam-related issues once this is merged.

[RFC 14]: https://github.com/bytecodealliance/rfcs/pull/14
2021-09-27 12:27:19 -05:00
Chris Fallin
344a219245 Merge pull request #3383 from akirilov-arm/vany_true
Cranelift AArch64: Fix the VanyTrue implementation for 64-bit elements
2021-09-24 09:26:36 -07:00
Anton Kirilov
0fb3acfb94 Cranelift AArch64: Fix the VanyTrue implementation for 64-bit elements
Copyright (c) 2021, Arm Limited.
2021-09-23 20:39:46 +01:00
Anton Kirilov
930b1f17f0 Cranelift AArch64: Implement scalar FmaxPseudo and FminPseudo
Copyright (c) 2021, Arm Limited.
2021-09-23 15:11:01 +01:00
Chris Fallin
65fde3a86b Merge pull request #3380 from dheaton-arm/implement-iabs
Implement `Iabs` for the interpreter
2021-09-22 10:00:53 -07:00
Chris Fallin
b076c99af9 Merge pull request #3379 from dheaton-arm/implement-sqmulroundsat
Implement `SqmulRoundSat` for interpreter
2021-09-22 09:59:13 -07:00
Chris Fallin
dd7310df04 Merge pull request #3361 from dheaton-arm/implement-vecops
Implement `VhighBits` & `Vselect` for interpreter
2021-09-22 09:22:52 -07:00
Chris Fallin
76f9cfd79c Merge pull request #3354 from afonso360/interp-b
Add `bextend`,`breduce` and `bmask` to interpreter
2021-09-22 09:22:04 -07:00
Chris Fallin
3474965ca6 Merge pull request #3322 from sparker-arm/aarch64-lse-ops
AArch64 LSE atomic_rmw support
2021-09-22 09:21:28 -07:00
dheaton-arm
faaf6b537a Prevent running tests on legacy backend.
Copyright (c) 2021, Arm Limited
2021-09-22 13:50:31 +01:00
dheaton-arm
539b1de5f4 Prevent test running on legacy backend.
Copyright (c) 2021, Arm Limited
2021-09-22 13:48:59 +01:00
dheaton-arm
cb30ecc7bc Implement Iabs for the interpreter
Implemented `Iabs` to return the absolute integer value with wrapping.

Copyright (c) 2021, Arm Limited
2021-09-22 12:59:30 +01:00
dheaton-arm
02ff19f2fc Implement SqmulRoundSat for interpreter
Implemented `SqmulRoundSat` for the Cranelift interpreter, performing
QN-format fixed point multiplication for 16 and 32-bit integers in
SIMD vectors.

Copyright (c) 2021, Arm Limited
2021-09-22 12:58:41 +01:00
dheaton-arm
63d85e1dc3 Prevent running simd-vhighbits.clif on legacy backend.
Copyright (c) 2021, Arm Limited.
2021-09-22 11:43:57 +01:00
dheaton-arm
335177a97e Remove legacy backend from test
Copyright (c) 2021, Arm Limited
2021-09-22 09:42:18 +01:00