wasmtime

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Commit Graph

Author	SHA1	Message	Date
Jakob Stoklund Olesen	4192ba0532	Define register classes for 4 ISAs.	2016-11-11 15:08:12 -08:00
Jakob Stoklund Olesen	b0b6a8f693	Define register banks. Add a RegBank class for describing CPU register banks. Define register banks for all the ISA stubs. The ARM32 floating point bank in particular requires attention.	2016-11-11 14:17:10 -08:00
Jakob Stoklund Olesen	77c672a279	Add stubs for Intel and ARM architectures. The Intel ISA handles both 32-bit and 64-bit code. ARM is split into separate arm32 and arm64 ISAs since the architectures have little in common in instruction encodings and register files.	2016-11-11 11:32:05 -08:00

Author

SHA1

Message

Date

Jakob Stoklund Olesen

4192ba0532

Define register classes for 4 ISAs.

2016-11-11 15:08:12 -08:00

Jakob Stoklund Olesen

b0b6a8f693

Define register banks.

Add a RegBank class for describing CPU register banks.

Define register banks for all the ISA stubs. The ARM32 floating point
bank in particular requires attention.

2016-11-11 14:17:10 -08:00

Jakob Stoklund Olesen

77c672a279

Add stubs for Intel and ARM architectures.

The Intel ISA handles both 32-bit and 64-bit code.

ARM is split into separate arm32 and arm64 ISAs since the architectures
have little in common in instruction encodings and register files.

2016-11-11 11:32:05 -08:00

3 Commits