Memory access instructions which took the GPR_ZERO_DEREF_SAFE register
class (that was removed in #600) should check for the need of either an
offset (r13/rbp) or the SIB byte (r12/rsp). Some load/store instructions
would already take an index, thus already contain the SIB byte in this
case (see instructions which have a comment telling that the else branch
already contains an SIB byte). Non-indexed memory accesses lacked the
SIB byte check, which this patch adds.
* Rename size to base_size and introduce a compute_size function;
* Add infra to inspect in/outs registers when computing the size of an instruction;
* Remove the GPR_SAFE_DEREF and GPR_ZERO_DEREF_SAFE register classes on x86 (fixes#335);
* Add encodings for i8 and i16 copy, spill, fill, ireduce.i8.i16
Also adds legalization for srem, irsub_imm, {u,s}extend.i16.i8
Fixes#477 cc #466
* Legalize popcnt, clz and ctz for i8 and i16
* Fix bug in call_memset
* Add 'jump_table_entry' and 'indirect_jump' instructions.
* Update CodeSink to keep track of code size. Pretty up clif-util's disassembly output.
* Only disassemble the machine portion of output. Pretty print the read-only data after it.
* Update switch frontend code to use new br_table instruction w/ default.
* Reorganize the global value kinds.
This:
- renames "deref" global values to "load" and gives it a offset that works
like the "load" instructions' does
- adds an explicit "iadd_imm" global value kind, which replaces the
builtin iadd in "vmctx" and "deref" global values.
- also renames "globalsym" to "symbol"
