Commit Graph

26 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
62641d4553 Fix a type error in the legalizer patterns.
The carry and borrow values are boolean, so we have to convert them to
an integer type with bint(c) before we can add them to the result.

Also tweak the default legalizer action for unsupported types: Only
attempt a narrowing pattern for lane types > 32 bits.

This was found by @angusholder's new type checks in the verifier.
2017-03-29 15:00:27 -07:00
Jakob Stoklund Olesen
ca2b1c79d7 Generate binemit::emit_inst() functions.
Use the meta language encoding recipes to generate an emit_inst()
function for each ISA. The generated calls into recipe_*() functions
that must be implemented by hand.

Implement recipe_*() functions for the RISC-V recipes.

Add the TargetIsa::emit_inst() entry point which emits an instruction to
a CodeSink trait object.
2017-03-28 14:44:36 -07:00
Jakob Stoklund Olesen
32709a56ca Upgrade to rustfmt 0.8.0.
Lots of changes this time.

Worked around what looks like a rustfmt bug in parse_inst_operands where
a large match was nested inside Ok().
2017-03-14 10:48:05 -07:00
Jakob Stoklund Olesen
3578fbc428 Implement From traits on ArgAction for convenience. 2017-03-07 15:13:55 -08:00
Jakob Stoklund Olesen
83d3a1020d Heed uext and sext annotations on RISC-V arguments.
Translate the small integer arguments to i32 or i64 with the appropriate
extend and ireduce instructions.
2017-03-07 15:07:00 -08:00
Jakob Stoklund Olesen
5d266acb5f Legalize entry block arguments to match ABI types.
Insert conversion code that reconstructs the original function argument
types from the legalized ABI signature.

Add abi::legalize_abi_value(). This function is used when adapting code
to a legalized function signature.
2017-03-07 13:29:19 -08:00
Jakob Stoklund Olesen
e84a4e41a0 Implement legalize_signature for RISC-V.
Add an abi module with code that is probably useful to all ISAs when
implementing this function.

Add a unit() method to RegClassData which can be used to index the
register units in a class.
2017-03-03 11:09:55 -08:00
Jakob Stoklund Olesen
408395db25 Add a legalize_signature method to TargetIsa.
This entry point will be used for controlling ABI conventions when
legalizing.

Provide an empty implementation for RISC-V and let the other ISAs crash
in legalization.

This is just the scaffolding. We still need to:

- Rewrite the entry block arguments to match the legalized signature.
- Rewrite call and return instructions.
- Implement the legalize_signature() function for all ISAs.
- Add shared generic types to help with the legalize_signature()
  functions.
2017-03-03 11:00:26 -08:00
Jakob Stoklund Olesen
329e51ac4f SSA register coloring pass.
This is a bare-bones outline of the SSA coloring pass. Many features are
missing, including:

- Handling instruction operand constraints beyond simple register
  classes.
- Handling ABI requirements for function arguments and return values.
- Generating shuffle code for EBB arguments.
2017-02-22 11:53:01 -08:00
Angus Holder
a4e4776087 Removed the Opcode::NotAnOpcode variant, replaced its uses with Option<Opcode>, and used the NonZero optimization to maintain the small 1-byte size of an optional Opcode. 2017-02-22 10:22:08 -08:00
Jakob Stoklund Olesen
a7d24ab1dc Compute the controlling type variable accurately.
Some polymorphic instructions don't return the controlling type
variable, so it has to be computed from the designated operand instead.

- Add a requires_typevar_operand() method to the operand constraints
  which indicates that.
- Add a ctrl_typevar(dfg) method to InstructionData which computes the
  controlling type variable correctly, and returns VOID for monomorphic
  instructions.
- Use ctrl_typevar(dfg) to drive the level-1 encoding table lookups.
2017-02-21 16:26:19 -08:00
Jakob Stoklund Olesen
3072728d37 Give register classes a name.
This is just for better error messages etc.
2017-02-16 13:57:28 -08:00
Jakob Stoklund Olesen
2361467536 Return RegInfo by value from TargetIsa::register_info().
The struct is just a pair of static references, and we don't need the
double indirection.
2017-02-14 16:05:54 -08:00
Jakob Stoklund Olesen
4293bed745 Fix a dead code warning from the new Rust compiler.
On ISAs with no instruction predicates, just emit an unimplemented!()
stub for the check_instp() function. It is unlikely that a finished ISA
will not have any instruction predicates.
2017-02-03 11:28:59 -08:00
Jakob Stoklund Olesen
3c4d54c4bd Implement value affinities for register allocation.
An SSA value is usually biased towards a specific register class or a
stack slot, depending on the constraints of the instructions using it.

Represent this bias as an Affinity enum, and implement a merging
algorithm for updating an affinity to satisfy a new constraint.

Affinities will be computed as part of the liveness analysis. This is
not implemented yet.
2017-01-27 10:22:50 -08:00
Jakob Stoklund Olesen
c132b8c328 Upgrade to rustfmt 0.7.1 2017-01-25 15:17:27 -08:00
Jakob Stoklund Olesen
672e4abd7e Compute register class intersections.
Ensure that the set of register classes is closed under intersection.

Provide a RegClass::intersect() method which finds the register class
representing the intersection of two classes.

Generate a bit-mask of subclasses for each register class to be used by
the intersect() method.

Ensure that register classes are sorted topologically. This is also used
by the intersect() method.
2017-01-25 13:57:43 -08:00
Jakob Stoklund Olesen
0394f35034 Add operand register constraints.
Every encoding recipe must specify register constraints on input and
output values.

Generate recipe constraint tables along with the other encoding tables.
2017-01-25 13:35:18 -08:00
Jakob Stoklund Olesen
58dedb673a Add an AllocatableSet for registers.
This set of available register units also manages register aliasing in
an efficient way.

Detect if the units in a register straddles mask words. The algorithm
for allocating multi-unit registers expect the whole register to be
inside a single mask word. We could handle this if necessary, but so far
no ISAs need it.
2017-01-23 12:43:32 -08:00
Jakob Stoklund Olesen
ae926157c2 Generate register class descriptors.
Add a mechanism for defining sub-classes of register classes.
2017-01-20 14:23:06 -08:00
Jakob Stoklund Olesen
19ac05577c Fill in boilerplate for Intel and ARM targets.
The intel, arm32, and arm32 targets were only defined in the meta
language previously. Add Rust implementations too.

This is mostly boilerplate, except for the unit tests in the
registers.rs files.
2016-11-23 10:42:07 -08:00
Jakob Stoklund Olesen
1f6dd0dab7 Generate register bank descriptions.
Use the information in the ISA's registers.py files to generate a
RegInfo Rust data structure.
2016-11-22 18:15:21 -08:00
Jakob Stoklund Olesen
e24291fe4c Return a Result from the TargetIsa::encode() method.
When an instruction can't be encoded, provide a viable legalization
action in the form of a Legalize enum.
2016-11-03 19:15:36 -07:00
Jakob Stoklund Olesen
3da569de06 Require documentation on cretonne public items. 2016-10-26 19:10:06 -07:00
Jakob Stoklund Olesen
b6ff2621f9 File stale path references.
After rearranging the directory layout, some paths in documentation
needed updating.

Fix some typos too.
2016-10-24 13:27:10 -07:00
Jakob Stoklund Olesen
0764df28b5 Move library crates under 'lib/'.
Give these crates each a more standard directory layout with sources in
a 'src' sub-sirectory and Cargo.toml in the top lib/foo directory.

Add license and description fields to each.

The build script for the cretonne crate now lives in
'lib/cretonne/build.rs' separating it from the normal library sources
under 'lib/cretonne/src'.
2016-10-17 14:44:43 -07:00