Commit Graph

3081 Commits

Author SHA1 Message Date
Johnnie Birch
500f530322 Add support for i32x4_trunc_sat_f64x2_s for x64 2021-07-26 22:24:30 -07:00
Johnnie Birch
23290f0450 Add support for i32x4_trunc_sat_f64x2_u for x64 2021-07-26 22:24:30 -07:00
Johnnie Birch
5deda27977 Add support for Saturating Rounding Q-format Multiplication for x64 2021-07-26 20:32:46 -07:00
Johnnie Birch
ffec1f9b41 Fix for 3089 X64 ext_mul_i8x16 has incorrect lowering
Also factors out unnecessary temp register
2021-07-26 20:06:43 -07:00
Andrew Brown
766774e1f5 refactor: reorganize crate imports 2021-07-26 13:39:16 -07:00
Andrew Brown
6b86984c41 x64: avoid load-coalescing SIMD operations with non-aligned loads
Fixes #2943, though not as optimally as may be desired. With x64 SIMD
instructions, the memory operand must be aligned--this change adds that
check. There are cases, however, where we can do better--see #3106.
2021-07-26 13:39:16 -07:00
Nick Fitzgerald
a2cfddff9c Merge pull request #3116 from fitzgen/update-gimli-and-addr2line
Update `gimli` to 0.25; `addr2line` to 0.16
2021-07-26 13:01:37 -07:00
Chris Fallin
0f068ac933 Merge pull request #3117 from fitzgen/log-levels
cranelift: Move most debug-level logs to the trace level
2021-07-26 12:52:39 -07:00
Nick Fitzgerald
10eead18c8 Update object to 0.26.0 2021-07-26 12:10:41 -07:00
Nick Fitzgerald
4283d2116d cranelift: Move most debug-level logs to the trace level
Cranelift crates have historically been much more verbose with debug-level
logging than most other crates in the Rust ecosystem. We log things like how
many parameters a basic block has, the color of virtual registers during
regalloc, etc. Even for Cranelift hackers, these things are largely only useful
when hacking specifically on Cranelift and looking at a particular test case,
not even when using some Cranelift embedding (such as Wasmtime).

Most of the time, when people want logging for their Rust programs, they do
something like:

    RUST_LOG=debug cargo run

This means that they get all that mostly not useful debug logging out of
Cranelift. So they might want to disable logging for Cranelift, or change it to
a higher log level:

    RUST_LOG=debug,cranelift=info cargo run

The problem is that this is already more annoying to type that `RUST_LOG=debug`,
and that Cranelift isn't one single crate, so you actually have to play
whack-a-mole with naming all the Cranelift crates off the top of your head,
something more like this:

    RUST_LOG=debug,cranelift=info,cranelift_codegen=info,cranelift_wasm=info,...

Therefore, we're changing most of the `debug!` logs into `trace!` logs: anything
that is very Cranelift-internal, unlikely to be useful/meaningful to the
"average" Cranelift embedder, or prints a message for each instruction visited
during a pass. On the other hand, things that just report a one line statistic
for a whole pass, for example, are left as `debug!`. The more verbose the log
messages are, the higher the bar they must clear to be `debug!` rather than
`trace!`.
2021-07-26 11:50:16 -07:00
Nick Fitzgerald
3d76cbdf34 Update gimli to 0.25; addr2line to 0.16 2021-07-26 11:04:53 -07:00
Afonso Bordado
a2fb019ba7 cranelift: Add basic i128 support in interpreter 2021-07-23 11:22:07 -07:00
Afonso Bordado
084383f60a cranelift: Add support for i128 values in DataValue 2021-07-23 11:22:07 -07:00
Afonso Bordado
df48798396 cranelift: Emit a trap when dividing by zero in interpreter
Fixes #3058
2021-07-22 10:43:54 -07:00
Afonso Bordado
6be4441bbf cranelift: Resolve alias lookups in interpreter 2021-07-22 10:42:29 -07:00
Afonso Bordado
065190f975 cranelift: Implement br_table on the interpreter 2021-07-20 15:31:27 -07:00
Afonso Bordado
3a38400447 aarch64: Refactor lower_icmp to use a single materialize_bool_result 2021-07-19 09:31:14 -07:00
Afonso Bordado
14d1c7ee9f aarch64: Refactor lower_icmp to allow returning a different flag 2021-07-19 09:31:14 -07:00
Afonso Bordado
7526cdc65e cranelift: Use ValueConversionKind in branches 2021-07-19 09:31:14 -07:00
Afonso Bordado
037bd41c67 cranelift: Rename Interpreter overflow method 2021-07-19 09:31:14 -07:00
Afonso Bordado
e628fb376f aarch64: Fix incorrect code generation for overflow icmp in i16 values 2021-07-19 09:31:14 -07:00
Afonso Bordado
04033fe645 cranelift: Implement overflow flags for icmp in interpreter 2021-07-19 09:31:14 -07:00
Afonso Bordado
c42b725ce9 cranelift: Fix br_icmp in interpreter 2021-07-19 09:31:14 -07:00
Afonso Bordado
004af01a88 cranelift: Fix brz,brnz instructions in the interpreter 2021-07-19 09:31:14 -07:00
Qiu Wenbo
eafd10c1e8 Disassembler support for RV32/64 2021-07-19 18:20:20 +08:00
Qiu Wenbo
f628d06118 Upgrade capstone to v0.9 2021-07-19 17:14:28 +08:00
Afonso Bordado
db5566dadb aarch64: Fix lowering amounts for shifts
This commit addresses two issues:
* A panic when shifting any non i128 type by i128 amounts (#3064)
* Wrong results when lowering shifts with small types (i8, i16)

In these types when shifting for amounts larger than the size of the
type, we would not get the wrapping behaviour that we see on i32 and i64.
This is because in these larger types, the wrapping behaviour is automatically
implemented by using the appropriate instruction, however we do not
have i8 and i16 specific instructions, so we have to manually wrap
the shift amount with an AND instruction.

This issue is also found on x86_64 and s390x, and a separate issue will
be filed for those.

Closes #3064
2021-07-16 22:08:02 +01:00
Anton Kirilov
6c3d7092b9 Enable the simd_conversions test for AArch64
Copyright (c) 2021, Arm Limited.
2021-07-16 22:04:45 +01:00
Johnnie Birch
2452a4cd74 Refactor lowering structure for ext_mul on x64 and add comments 2021-07-15 01:07:52 -07:00
Johnnie Birch
e5b6bee968 Add emit tests to ext_mul_* instructions 2021-07-15 01:07:52 -07:00
Johnnie Birch
6fbe0b72bd Add simd_extmul_* support for x64 2021-07-15 01:07:52 -07:00
Johnnie Birch
d8e813204e Fold fcvt_low_from_uinit into previously existing clif instructions 2021-07-09 10:39:05 -07:00
Johnnie Birch
6dd2df4fb3 Update comment on fcvt_low_from_sint instruction 2021-07-09 10:39:05 -07:00
Johnnie Birch
2d676d838f Implements f64x2.convert_low_i32x4_u for x64 2021-07-09 10:39:05 -07:00
Chris Fallin
c71ad9490e Merge pull request #3056 from afonso360/aarch64-fix-overflow-imm
aarch64: Fix incorrect encoding of large const values in icmp.
2021-07-03 16:05:49 -07:00
Afonso Bordado
eebae8d4c8 aarch64: Fix incorrect encoding of large const values in icmp.
When encoding constants as immediates into an RSE Imm12 instruction we need to take special care to check if the value that we are trying to input does not overflow its type when viewed as a signed value. (i.e. iconst.i8 200)

We cannot both put an immediate and sign extend it, so we need to lower it into a separate reg, and emit the sign extend into the instruction.

For more details see the [cg_clif bug report](https://github.com/bjorn3/rustc_codegen_cranelift/issues/1184#issuecomment-873214796).
2021-07-03 22:42:15 +01:00
bjorn3
37115c10e0 Implement Display for settings::Value 2021-07-03 14:34:42 +02:00
Benjamin Bouvier
4c595f4f9d Remove unused store_stackslot/load_stackslot trait methods. 2021-07-02 18:09:33 +02:00
Benjamin Bouvier
91c65d739f Remove unused code in machinst 2021-07-02 18:09:33 +02:00
Afonso Bordado
ce537cf431 cranelift: Add fuel mechanism to the interpreter 2021-07-02 06:26:16 -07:00
Chris Fallin
f2d2f3a841 Merge pull request #3044 from akirilov-arm/simd_i32x4_trunc_sat_f64x2
Enable the simd_i32x4_trunc_sat_f64x2 test for AArch64
2021-07-01 09:28:39 -07:00
Afonso Bordado
7453bd5f0d Cranelift CLIF-level differential fuzzer (#3038)
* cranelift: Initial fuzzer implementation

* cranelift: Generate multiple test cases in fuzzer

* cranelift: Separate function generator in fuzzer

* cranelift: Insert random instructions in fuzzer

* cranelift: Rename gen_testcase

* cranelift: Implement div for unsigned values in interpreter

* cranelift: Run all test cases in fuzzer

* cranelift: Comment options in function_runner

* cranelift: Improve fuzzgen README.md

* cranelift: Fuzzgen remove unused variable

* cranelift: Fuzzer code style fixes

Thanks! @bjorn3

* cranelift: Fix nits in CLIF fuzzer

Thanks @cfallin!

* cranelift: Implement Arbitrary for TestCase

* cranelift: Remove gen_testcase

* cranelift: Move fuzzers to wasmtime fuzz directory

* cranelift: CLIF-Fuzzer ignore tests that produce traps

* cranelift: CLIF-Fuzzer create new fuzz target to validate generated testcases

* cranelift: Store clif-fuzzer config in a separate struct

* cranelift: Generate variables upfront per function

* cranelift: Prevent publishing of fuzzgen crate
2021-07-01 06:32:01 -07:00
Afonso Bordado
a4770a7e28 cranelift: Prevent overflow errors in interpreter for add,sub,mul 2021-06-30 06:32:16 -07:00
Anton Kirilov
330f02aa09 Enable the simd_i32x4_trunc_sat_f64x2 test for AArch64
Also, reorganize the AArch64-specific VCode instructions for unary
narrowing and widening vector operations, so that they are more
straightforward to use.

Copyright (c) 2021, Arm Limited.
2021-06-30 12:17:53 +01:00
Johnnie Birch
1acb40b2aa Fix return type of for truc_sat and convert instructions
Type_of says is to determine the return value for a webassembly
operator. Truc_sat and convert simd instructions appear to be misplaced.
2021-06-28 15:20:39 -07:00
Anton Kirilov
98f1ac789e Enable the simd_i16x8_q15mulr_sat_s test on AArch64
Copyright (c) 2021, Arm Limited.
2021-06-28 12:24:31 +01:00
Chris Fallin
d42c8692bc x64 backend: be explicit about unimplemented opcodes.
As discussed in #3035, most backends have explicit
`unimplemented!(...)` match-arms for opcode lowering cases that are not
yet implemented; this allows the backend maintainer to easily see what
is not yet implemented, and avoiding a catch-all wildcard arm is less
error-prone as opcodes are added in the future.

However, the x64 backend was the exception: as @akirilov-arm pointed
out, it had a wildcard match arm. This fixes the issue by explicitly
listing all opcodes the x64 backend does not yet implement.

As per our tests, these opcodes are not used or need by Wasm lowering;
but, it is good to know that they exist, so that we can eventually
either support or remove them.

This was a good exercise for me as I wasn't aware of a few of these in
particular: e.g., aarch64 supports `bmask` while x64 does not, and there
isn't a good reason why x64 shouldn't, especially if others hope to use
Cranelift as a SIMD-capable general codegen in the future.

The `unimplemented!()` cases are separate from `panic!()` ones: my
convention here was to split out those that are logically just *missing*
from those that should be *impossible*, mostly due to expected removal
by legalization before we reach the lowering step.
2021-06-26 15:29:14 -07:00
Afonso Bordado
e85eb77c45 aarch64: Implement missing atomic rmw ops 2021-06-25 07:51:46 +01:00
Chris Fallin
652f21e3e0 Merge pull request #3026 from afonso360/aarch64-elf-tls
aarch64: Implement TLS ELF GD Relocations
2021-06-24 11:54:34 -07:00
Chris Fallin
7d47ba12c5 Merge pull request #3028 from cfallin/x86-legacy
cranelift-codegen: move old x86 and RISC-V backends to isa/legacy/.
2021-06-24 11:38:08 -07:00