Commit Graph

37 Commits

Author SHA1 Message Date
Nicolas B. Pierron
7e398af999 Basic-block: Insert regmove instructions in new blocks dedicated to hold the diversions. 2019-09-05 14:55:35 +02:00
Andrew Brown
d64e454004 Improve uimm128 parsing
This commit changes 128-bit constant parsing in two ways:
 - it adds the ability to use underscores to separate digits when writing a 128-bit constant in hexadecimal; e.g. `0x00010203...` can now be written as `0x0001_0203_...`
 - it adds a new mechanism for parsing 128-bit constants using integer/float/boolean literals; e.g. `vconst.i32x4 [1 2 3 4]`. Note that currently the controlling type of the instruction dictates how many literals to parse inside the brackets.
2019-09-04 07:16:04 -07:00
Julian Seward
98056aa05d Don't incorrectly omit a REX prefix for some encodings of copy_to_ssa. Mozilla bug #1576969.
Also, as a ridealong fix, removes R32 encodings for x86_64 in `enc_r32_r64`,
since the type `rXX` by definition only exists for targets with word size `XX`
bits.
2019-09-04 13:59:01 +02:00
Andrew Brown
020e5987d3 Use little-endian ordering for CLIF vconst immediate
Examining wasm-objdump revealed that it stores SIMD constants in little-endian order, e.g.:

000071 func[2] <test_const>:
 000072: fd 02 01 00 00 00 02 00 00 | v128.const 0x00000001 0x00000002 0x00000003 0x00000004
 00007b: 00 03 00 00 00 04 00 00 00 |
 000084: fd 0d 03                   | i32x4.extract_lane 3
 000087: 0b                         | end

This change avoids confusion by making the CLIF representation use little-endian order as well.
2019-08-26 16:12:06 -07:00
Andrew Brown
c3cc225de9 Add filetest for verifying emitted rodata (i.e. test rodata) 2019-08-26 16:12:06 -07:00
Andrew Brown
8d812b24cc Add x86 encoding for vconst 2019-08-26 16:12:06 -07:00
Ujjwal Sharma
ec8f72bf20 Use roundss/roundsd when available for Ceil/Floor/Trunc/Nearest (#931)
Don't tie the preexisting SIMD ISA predicates to the shared
enable_simd setting but make new ones instead.

Fixes: https://github.com/CraneStation/cranelift/issues/908
2019-08-26 13:37:27 +02:00
Andrew Brown
cc57e84cbd Fix segfault due to b64 encoding (#919)
* Fix segfault due to b64 encoding

Prior to this patch, bconst.b64 encoded its instruction with a 32-bit immediate that caused improper decoding of the MOV instruction; instead, use a REX prefix and rely on zero-extension of the immediate. Fixes #911.
2019-08-23 18:04:34 +02:00
Andrew Brown
ff3c44385c Add test run to cranelift-filetests to allow executing CLIF (#890)
* Add ability to run CLIF IR using `clif-util run [-v] {file}` and add `test run` to cranelift-filetests to allow executing CLIF

This re-factors the compile/execute parts to a FunctionRunner that is shared between cranelift-filetests and clif-util. CLIF can be now be run using `clif-util run` as well as during `clif-util test` for files with a `test run` header. As before, only functions suffixed with a `run` comment are executed. The `run: fn(...) == ...` expression syntax is left for a subsequent change.
2019-08-21 18:03:09 +02:00
Dan Gohman
fbfeaaa32b Revert the test changes too.
In 1169dc520815fa4a6b1285914748408729a28caa, I forgot to git add the
test file changes.
2019-08-20 15:26:52 -07:00
Andrew Brown
b4ef90cfcd Remove SSE2 setting for x86
In talking to @sunfishcode, he preferred to avoid the confusion of more ISA predicates by eliminating SSE2. SSE2 was released with the Pentium 4 in 2000 so it is unlikely that current CPUs would have SIMD enabled and not have this feature. I tried to note the SSE2-specific instructions with comments in the code.
2019-08-20 10:21:12 -07:00
Andrew Brown
3fdc78174f Add x86 implementation of extractlane instruction 2019-08-20 10:21:12 -07:00
Benjamin Bouvier
2ee35b7ea1 Implement a Windows Baldrdash calling convention; 2019-08-16 14:25:15 +02:00
Sean Stangl
c7b4b98cac Add a fold_redundant_jumps() pass to the branch relaxation phase. (#887) 2019-08-09 15:30:11 -06:00
Benjamin Bouvier
627ba24b59 Simplify jump table instructions and add missing conversion;
This makes non-legalized jump table instructions operate on operands with
pointer-sized types. This means we need to extend smaller types into the
pointer-sized operand, when the two don't match.
2019-08-02 18:39:39 +02:00
Andrew Brown
084e279def Add x86 implementation of splat instruction 2019-07-16 17:07:44 -07:00
Andrew Brown
3b36a1d1d8 Add x86 implementation of insertlane instruction 2019-07-16 17:07:44 -07:00
Andrew Brown
683e7c75a3 Add x86-specific shuffle instructions
This includes both PSHUFD and PSHUFB; these are necessary to legalize future SIMD instructions.
2019-07-16 17:07:44 -07:00
Andrew Brown
61772e9775 Add raw_bitcast instruction
Casts bits as a different type of the same width with no change to the data (unlike bitcast)
2019-07-16 17:07:44 -07:00
Andrew Brown
5f0e5567c1 Add scalar_to_vector instruction
Moves scalar values in a GPR register to an FPR register
2019-07-16 17:07:44 -07:00
Andrew Brown
f2c48009e8 Disable SIMD features by default 2019-07-16 17:07:44 -07:00
Nicolas B. Pierron
8edc40cb49 BB-like manual legalization for x86 ISA 2019-07-12 14:20:26 +02:00
Nicolas B. Pierron
3ac7466cab Legalize br_table to a BB-like format. 2019-07-09 16:48:54 +02:00
Nicolas B. Pierron
1963c223b1 Legalize trapz/trapnz to a BB-like format. 2019-07-09 16:02:49 +02:00
Nicolas B. Pierron
f431465802 Replace newly inserted fallthrough by jump. 2019-07-08 15:17:49 +02:00
Nicolas B. Pierron
7b36cb58a0 Use BB-like EBB in filetests/isa/x86/*.clif 2019-07-08 15:17:49 +02:00
Nicolas B. Pierron
77eb34e20f Use BB-like EBB in filetests/isa/riscv/*.clif 2019-07-08 15:17:49 +02:00
Lars T Hansen
420850adf0 Record information about sections of emitted code+data.
The result of the emitter is a vector of bytes holding machine code,
jump tables, and (in the future) other read-only data.  Some clients,
notably Firefox's Wasm compiler, needs to separate the machine code
from the data in order to insert more code directly after the code
generated by Cranelift.

To make such separation possible, we record more information about the
emitted bytes: the sizes of each of the sections of code, jump tables,
and read-only data, as well as the locations within the code that
reference (PC-relatively) the jump tables and read-only data.
2019-05-31 08:39:57 +02:00
iximeow
6059936113 remove rex-prefixed recipes for e9 and eb jumps
while not incorrect, the prefix has no additional semantics on these
  instructions other than taking an extra byte for the jump
2019-05-29 11:32:44 +02:00
Nicolas B. Pierron
72b5487563 Add x86 encoding for rotr_imm and rotl_imm. 2019-05-20 11:56:56 +02:00
bjorn3
71a345e813 Legalize fcvt_from_u/sint.f32/f64.i8/i16 2019-05-20 11:52:43 +02:00
Benjamin Bouvier
95e6fc9efc Avoid inserting checks during div/rem legalization when the input is a constant immediate; 2019-04-25 16:58:41 +02:00
Philip Craig
b74b49f7c6 Fix x86-64 encoding of uextend.i64.i8
The non-REX encoding of movzbl requires one of the ABCD registers as input.
2019-04-08 05:50:59 -07:00
Steffen Butzer
92b3987e54 windows/x64 call convention: only use XMM0 for float return values (#691) 2019-03-11 11:44:44 +01:00
Steffen Butzer
2a519092a0 Use single index for param register allocation for windows callconv (… (#693)
* Use single index for param register allocation for windows callconv (#691)

The used registers depend entirely on the parameter index (1st, 2nd, 3rd, 4th, ... param)
and we cannot shift unused registers to other indexes, if they are not designated for
the use for that parameter index.
2019-03-05 12:17:41 +01:00
Benjamin Bouvier
afa4a749c5 Fix #666: Change the way we consider a block has been visited in relaxation;
This was previously using the following condition to decide that a block
hadn't been visited yet: either dest_offset is non-0 or the block isn't
the entry block. Unfortunately, this didn't work when the first block
would be non-empty but wouldn't generate code at all.

Since the original code would do at least one pass over the entire code,
the first pass that determines initial EBB offsets is done separately,
without considering branch relaxation. This ensures that all EBBs have
been visited and have correct initial offsets, and doesn't require a
special check to know whether an EBB has been visited or not.
2019-02-12 14:39:45 +01:00
lazypassion
747ad3c4c5 moved crates in lib/ to src/, renamed crates, modified some files' text (#660)
moved crates in lib/ to src/, renamed crates, modified some files' text (#660)
2019-01-28 15:56:54 -08:00