Also, say "guard-offset pages" rather than just "guard pages" to describe the
region of a heap which is never accessible and which exists to support
optimizations for heap accesses with offsets.
And, introduce a `Uimm64` immediate type, and make all heap fields use
`Uimm64` instead of `Imm64` since they really are unsigned.
* Introduce a `TargetFrontendConfig` type.
`TargetFrontendConfig` is information specific to the target which is
provided to frontends to allow them to produce Cranelift IR for the
target. Currently this includes the pointer size and the default calling
convention.
The default calling convention is now inferred from the target, rather
than being a setting. cranelift-native is now just a provider of target
information, rather than also being a provider of settings, which gives
it a clearer role.
And instead of having cranelift-frontend routines require the whole
`TargetIsa`, just require the `TargetFrontendConfig`, and add a way to
get the `TargetFrontendConfig` from a `Module`.
Fixes#529.
Fixes#555.
WebAssembly doesn't have non-dense jump tables, and higher-level users
are better served by the facilities in lib/frontend/src/switch.rs for
working with non-dense switches.
This eliminates the concept of "absent" jump table entries, which
were represented as "0" in the text format.
Also, jump table contents are now enclosed in `[` and `]`, so that
we can unambiguously display empty jump tables. Previously, empty jump
tables were displayed as if they had a single absent entry.
* Add encodings for i8 and i16 copy, spill, fill, ireduce.i8.i16
Also adds legalization for srem, irsub_imm, {u,s}extend.i16.i8
Fixes#477 cc #466
* Legalize popcnt, clz and ctz for i8 and i16
* Fix bug in call_memset
* Add 'jump_table_entry' and 'indirect_jump' instructions.
* Update CodeSink to keep track of code size. Pretty up clif-util's disassembly output.
* Only disassemble the machine portion of output. Pretty print the read-only data after it.
* Update switch frontend code to use new br_table instruction w/ default.
* Reorganize the global value kinds.
This:
- renames "deref" global values to "load" and gives it a offset that works
like the "load" instructions' does
- adds an explicit "iadd_imm" global value kind, which replaces the
builtin iadd in "vmctx" and "deref" global values.
- also renames "globalsym" to "symbol"
This makes several changes:
- It adds an index_type to heap declarations, allowing heaps to specify the
type for indexing. This also anticipates 64-bit heap support.
- It adds a memory_type to deref global values, allowing deref globals to
have types other than pointers. This is used to allow the bound variable
in dynamic heaps to have type i32, to match the index type in heaps
with i32 index type.
- And, it fixes heap legalization to do the bounds check in the heap's
index type.
This requires splitting X86PCRel4 into two separate relocations, to
distinguish the case where the instruction is a call, as Mach-O uses a
different relocation in that case.
This also makes it explicit that only x86-64 relocations are supported
currently.
This switches from a custom list of architectures to use the
target-lexicon crate.
- "set is_64bit=1; isa x86" is replaced with "target x86_64", and
similar for other architectures, and the `is_64bit` flag is removed
entirely.
- The `is_compressed` flag is removed too; it's no longer being used to
control REX prefixes on x86-64, ARM and Thumb are separate
architectures in target-lexicon, and we can figure out how to
select RISC-V compressed encodings when we're ready.
* Optimize 0.0 floating point constants. Rather than using the existing
process of emitting bit patterns and moving them into floating point
registers, use the `xorps` instruction to zero out the register.
* is_zero predicate function will not accept negative zero. Fixed formatting for encoding recipe and filetests.
* Start adding the load_complex and store_complex instructions.
N.b.:
The text format is not correct yet. Requires changes to the lexer and parser.
I'm not sure why I needed to change the RuntimeError to Exception yet. Will fix.
* Get first few encodings of load_complex working. Still needs var args type checking.
* Clean up ModRM helper functions in binemit.
* Implement 32-bit displace for load_complex
* Use encoding helpers instead of doing them all by hand
* Initial implementation of store_complex
* Parse value list for load/store_complex with + as delimiter. Looks nice.
* Add sign/zero-extension and size variants for load_complex.
* Add size variants of store_complex.
* Add asm helper lines to load/store complex bin tests.
* Example of length-checking the instruction ValueList for an encoding. Extremely questionable implementation.
* Fix Python linting issues
* First draft of postopt pass to fold adds and loads into load_complex. Just simple loads for now.
* Optimization pass now works with all types of loads.
* Add store+add -> store_complex to postopt pass
* Put complex address optimization behind ISA flag.
* Add load/store complex for f32 and f64
* Fixes changes to lexer that broke NaN parsing.
Abstracts away the repeated checks for whether or not the characters
following a + or - are going to be parsed as a number or not.
* Fix formatting issues
* Fix register restrictions for complex addresses.
* Encoding tests for x86-32.
* Add documentation for newly added instructions, recipes, and cdsl changes.
* Fix python formatting again
* Apply value-list length predicates to all LoadComplex and StoreComplex instructions.
* Add predicate types to new encoding helpers for mypy.
* Import FieldPredicate to satisfy mypy.
* Add and fix some "asm" strings in the encoding tests.
* Line-up 'bin' comments in x86/binary64 test
* Test parsing of offset-less store_complex instruction.
* 'sNaN' not 'sNan'
* Bounds check the lookup for polymorphic typevar operand.
* Fix encodings for istore16_complex.
* initial set of work for windows fastcall (x64) call convention
- call conventions: rename `fastcall` to `windows_fastcall`
- add initial set of filetests
- ensure arguments are written after the shadow space/store (offset-wise)
The shadow space available before the arguments (range 0..32)
is not used as spill space yet.
* address review feedback
* x86 recipes: emit StackOverflow trap for all sp-relative loads and stores
* x86 recipes: emit StackOverflow trap for push and pop
* x86 binary filetests: add stk_ovf trap annotations
regmove, regfill, and regspill have immediates which aren't value
operands, so they aren't in the set of things that can be described by
the existing constraint system. Consequently, constraints saying that
the non-REX encodings only support registers that don't need REX
prefixes don't work. Fow now, just remove the non-REX encodings, so
that they don't get selected when they aren't valid.
This fixes the last known issue with instruction shrinking, so it can
be re-enabled.
Add a calling-convention setting to the `Flags` used as part of the
`TargetIsa`. This allows Cretonne code that generates calls to use the
correct convention, such as when emitting libcalls during legalization
or when the wasm frontend is decoding functions. This setting can be
overridden per-function.
This also adds "fast", "cold", and "fastcall" conventions, with "fast"
as the new default. Note that "fast" and "cold" are not intended to be
ABI-compatible across Cretonne versions.
This will also ensure Windows users will get an `unimplemented!` rather
than silent calling-convention mismatches, which reflects the fact that
Windows calling conventions are not yet implemented.
This also renames SpiderWASM, which isn't camel-case, to Baldrdash,
which is, and which is also a more relevant name.
When an instruction has multiple valid encodings, such as with and
without a REX prefix on x86-64, Cretonne typically picks the encoding
which gives the register allocator the most flexibility, which is
typically the longest encoding. This patch adds a pass that runs after
register allocation that picks the smallest encoding, working within the
constraints of the register allocator's choices. The result is smaller
and easier to read encodings.
In the future, we may want to merge this pass into the relaxation pass,
or possibly fold it into the final encoding step, however for now, a
discrete pass will suffice.
Choosing smaller instruction encodings on eg. x86 is an optimization,
rather than a useful discrete setting.
Use "is_compressed" only for ISAs that have an explicit compression feature
that users of the output may to be aware of, such as RISC-V's RVC or
ARM's Thumb-2.
This adds a "colocated" flag to function and symbolic global variables which
indicates that they are defined along with the current function, so they can
use PC-relative addressing.
This also changes the function decl syntax; the name now always precedes the
signature, and the "function" keyword is no longer included.
