Commit Graph

273 Commits

Author SHA1 Message Date
Andrew Brown
6f1ed94e82 Fix documentation 2019-09-10 10:45:12 -07:00
Andrew Brown
295b2ef614 Avoid extra register movement when lowering an x86 insertlane to a float vector 2019-09-10 10:45:12 -07:00
Andrew Brown
3dfc68afb1 Avoid extra register movement when lowering the x86 scalar_to_vector of a float value 2019-09-10 10:45:12 -07:00
Andrew Brown
00bedca274 Avoid extra register movement when lowering the x86 extractlane of a float vector
This commit is based on the assumption that floats are already stored in XMM registers in x86. When extracting a lane, cranelift was moving the float to a regular register and back to an XMM register; this change avoids this by shuffling the float value to the lowest bits of the XMM register. It also assumes that the upper bits can be left as is (instead of zeroing them out).
2019-09-10 10:45:12 -07:00
Andrew Brown
ebc783e49b Use raw_bitcast when legalizing splat
raw_bitcast matches the intent of this legalization more clearly (to simply change the CLIF type without changing any bits) and the additional null encodings added are necessary for later instructions
2019-09-10 10:45:12 -07:00
Andrew Brown
7f152611a4 Log compiled and legalized functions 2019-09-10 10:45:12 -07:00
Sean Stangl
4b085b9cf7 Avoid unnecessary reallocations in domtree::with_function() (#1011) 2019-09-10 08:18:06 -06:00
Ujjwal Sharma
345b2dc0cc [codegen] add new recipe "rout" (#1014)
* [codegen] add new recipe "rout"

Add a new recipe "rout" intended to be used by arithematic operations
that output flags, currently being used for `iadd_cout` and `isub_bout`.

Fixes: https://github.com/CraneStation/cranelift/issues/1009
2019-09-10 12:55:24 +02:00
Philip Craig
3293ca6b69 Add cranelift-object 2019-09-09 21:54:20 -07:00
Nicolas B. Pierron
90b0b86f5c Simplify isa_builder macro 2019-09-09 13:30:02 +02:00
Julian Seward
d2443a75f3 legalizer/split.rs: simplify_branch_arguments: use SmallVec instead of Vec
This function is responsible for 8.5% of all heap allocation (calls) in CL.
This change avoids almost all of them by using a SmallVec::<[Value; 32]>
instead.  Dynamic instruction count falls by 0.25%.  The fixed size of 32 was
arrived at after profiling with fixed sizes of 1, 2, 4, 8, 16, 32, 64 and 128.
32 is as high as I can push it without the instruction count starting to creep
up again, and gets almost all the block-reduction win of 64 and 128.
2019-09-09 12:58:21 +02:00
Julian Seward
955cdd5f83 VirtRegs::find: use SmallVec instead of Vec for val_stack.
Pushing on the `val_stack` vector is CL's biggest source of calls to
malloc/realloc/free, by some margin.  It accounts for about 27.7% of all heap
blocks allocated when compiling wasm_lua_binarytrees.  This change removes
pretty much all dynamic allocation by changing to a SmallVec<[Value; 8]>
instead.  A fixed size of 4 gets all the gains to be had, in testing, so 8
gives some safety margin and is harmless from a stack-use perspective: 8
Values will occupy 32 bytes.

As a bonus, this change also reduces the compiler's dynamic instruction count
by about 0.5%.
2019-09-09 11:30:59 +02:00
bjorn3
0273eb84e0 Fix rebase 2019-09-07 09:55:09 -07:00
bjorn3
e8d4ef7c3d Fix review comments 2019-09-07 09:55:09 -07:00
bjorn3
e2b2b520eb Fix compilation 2019-09-07 09:55:09 -07:00
bjorn3
f4cdd3007c [split] Prevent double legalization of isplit and vsplit 2019-09-07 09:55:09 -07:00
bjorn3
2426bce9ac Fix load.i64 and store legalization 2019-09-07 09:55:09 -07:00
bjorn3
ffa1e946a7 Fix compilation 2019-09-07 09:55:09 -07:00
bjorn3
acd454890c Legalize load.i128 and store.i128 with arbitrary offsets 2019-09-07 09:55:09 -07:00
bjorn3
67593d997b Add b128 type to fix tests 2019-09-07 09:55:09 -07:00
bjorn3
fa9602df80 Legalize load.i128 and store.i128 2019-09-07 09:55:09 -07:00
bjorn3
3ae78fddde Fix warnings 2019-09-07 09:55:09 -07:00
bjorn3
dce521fa1c Fix lone isplit, when the corresponding iconcat will be created later during legalization 2019-09-07 09:55:09 -07:00
bjorn3
0d5b87038a Rustfmt 2019-09-07 09:55:09 -07:00
bjorn3
599b48d95f Narrowing legalize some more bitops 2019-09-07 09:55:09 -07:00
bjorn3
c7a8b6c9e5 Remove some dbg! invocations 2019-09-07 09:55:09 -07:00
bjorn3
762b5e494b Legalize brz.i128 and brnz.i128 2019-09-07 09:55:09 -07:00
bjorn3
83ac6dd4d4 [meta] Add some Debug derives 2019-09-07 09:55:09 -07:00
bjorn3
a43a3a5e9f [meta] Give a nicer error message when a legalization uses an incorrect number of arguments 2019-09-07 09:55:09 -07:00
bjorn3
8d0e8f8931 [meta] Fix legalization in presence of varargs 2019-09-07 09:55:09 -07:00
bjorn3
d9ee08c088 Fix bug when i128 ebb param is unused 2019-09-07 09:55:09 -07:00
bjorn3
44ecc9c3d0 [WIP] 2019-09-07 09:55:09 -07:00
bjorn3
954a2007d2 Fix isplit legalization 2019-09-07 09:55:09 -07:00
bjorn3
f04b334b20 Rustfmt 2019-09-07 09:55:09 -07:00
bjorn3
6f7d57a71f Handle isplit when it is not the result of a legalization 2019-09-07 09:55:09 -07:00
bjorn3
c1553194a7 Fix WideInt max size in insturctions.py 2019-09-07 09:55:09 -07:00
bjorn3
c9a25abbc4 Basic i128 support 2019-09-07 09:55:09 -07:00
Benjamin Bouvier
e35cf861db Fixes #984: Add a isa::lookup_by_name function;
This removes the explicit dependency on target-lexicon for the embedder,
which can instead use the ISA's name directly. It can simplify
dependency management, in particular avoid the need for synchronizing
the target-lexicon dependencies versions.

It also tweak the error when an ISA isn't built as part of Cranelift to
be a SupportDisabled error; this was dead code before this.
2019-09-06 16:19:01 +02:00
Benjamin Bouvier
c1609b70e8 [codegen] Allow using the pinned register as the heap base via a setting; 2019-09-06 16:18:27 +02:00
Benjamin Bouvier
660b8b28b8 [codegen] Add a pinned register that's entirely under the control of the user; 2019-09-06 16:18:27 +02:00
Benjamin Bouvier
d1d2e790b9 [meta] Morph a few pub into pub(crate), and remove dead code; 2019-09-06 15:47:20 +02:00
Benjamin Bouvier
8fba449b7b [meta] Introduce the EntityRefs structure instead of using dynamic lookup; 2019-09-06 15:47:20 +02:00
Benjamin Bouvier
29e3ec51c1 [meta] Introduce the Immediates structure instead of using dynamic lookup; 2019-09-06 15:47:20 +02:00
stefson
bafd79330d upgrade to latest target-lexicon 0.8.1
this fixes the compile for arm and aarch64

reported via https://github.com/CraneStation/cranelift/issues/977
2019-09-06 15:20:04 +02:00
Dan Gohman
d858ebb4aa Bump version to 0.42.0 2019-09-05 17:36:04 -07:00
Ujjwal Sharma
1a099f2e8c [codegen] change operand type from bool to iflag for isub borrow variants
The type of the borrow operands for the borrow variants of the isub
instruction (isub_bin, isub_bout, isub_borrow) was bool for compatibility
reasons for isa/riscv. Since support for these instructions on RISC
architectures has been temporarily suspended, we can safely change the
type to iflags.
2019-09-05 19:28:33 +02:00
Ujjwal Sharma
9fb8bdd6d5 [codegen] remove support for isub borrow variants on riscv
Previously, the borrow variants of isub (isub_bin, isub_bout and
isub_borrow) were being legalized for isa/riscv since RISC architectures
lack a flags register.

This forced us to return and accept booleans for these operations, which
proved to be problematic and inconvenient, especially for x86.

This commit removes support for said statements and all dependent
statements for isa/riscv so that we can work on a better legalization
strategy in the future.
2019-09-05 19:28:33 +02:00
Ujjwal Sharma
dce8ad8229 [codegen] add encodings for isub borrow variants
Add encodings for isub borrow variants (isub_bout, isub_bin,
isub_borrow) for x86_32, enabling the legalization for isub.i64 to work.

Bug: https://bugzilla.mozilla.org/show_bug.cgi?id=1576675
Bug: https://github.com/CraneStation/cranelift/issues/765
2019-09-05 19:28:33 +02:00
Benjamin Bouvier
1c28d43f00 [meta] Remove unused immfield index in the FormatField; 2019-09-05 17:55:03 +02:00
Benjamin Bouvier
38656cce35 [meta] Simplify and comment instruction building a bit; 2019-09-05 17:55:03 +02:00